@@ -5,9 +5,8 @@ static bool read_register(FuriHalSpiBusHandle* spi, uint8_t address, uint8_t* da
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bool ret = true;
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uint8_t instruction [] = {INSTRUCTION_READ , address };
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furi_hal_spi_acquire (spi );
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- ret =
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- (furi_hal_spi_bus_tx (spi , instruction , sizeof (instruction ), TIMEOUT_SPI ) &&
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- furi_hal_spi_bus_rx (spi , data , sizeof (data ), TIMEOUT_SPI ));
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+ furi_hal_spi_bus_tx (spi , instruction , sizeof (instruction ), TIMEOUT_SPI );
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+ furi_hal_spi_bus_rx (spi , data , sizeof (data ), TIMEOUT_SPI );
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furi_hal_spi_release (spi );
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return ret ;
@@ -184,9 +183,67 @@ bool set_sleep_mode(MCP2515* mcp_can) {
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return ret ;
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}
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+ // To set Loop Back Mode
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+ bool set_loop_back_mode (MCP2515 * mcp_can ) {
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+ bool ret = true;
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+ ret = set_new_mode (mcp_can , MCP_LOOPBACK );
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+ return ret ;
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+ }
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+
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+ // To write the mask-filters for the chip
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+ void write_mf (FuriHalSpiBusHandle * spi , uint8_t address , uint8_t ext , uint32_t id ) {
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+ uint16_t canId = (uint16_t )(id & 0x0FFFF );
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+ uint8_t bufData [4 ];
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+
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+ if (ext ) {
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+ bufData [MCP_EID0 ] = (uint8_t )(canId & 0xFF );
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+ bufData [MCP_EID8 ] = (uint8_t )(canId >> 8 );
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+ canId = (uint16_t )(id >> 16 );
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+ bufData [MCP_SIDL ] = (uint8_t )(canId & 0x03 );
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+ bufData [MCP_SIDL ] += (uint8_t )((canId & 0x1C ) << 3 );
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+ bufData [MCP_SIDL ] |= MCP_TXB_EXIDE_M ;
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+ bufData [MCP_SIDH ] = (uint8_t )(canId >> 5 );
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+ } else {
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+ bufData [MCP_SIDL ] = (uint8_t )((canId & 0x07 ) << 5 );
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+ bufData [MCP_SIDH ] = (uint8_t )(canId >> 3 );
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+ bufData [MCP_EID0 ] = 0 ;
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+ bufData [MCP_EID8 ] = 0 ;
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+ }
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+
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+ uint8_t instruction [] = {INSTRUCTION_WRITE , address };
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+
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+ furi_hal_spi_acquire (spi );
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+ furi_hal_spi_bus_tx (spi , instruction , sizeof (instruction ), TIMEOUT_SPI );
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+
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+ furi_hal_spi_bus_tx (spi , bufData , 4 , TIMEOUT_SPI );
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+ furi_hal_spi_release (spi );
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+ }
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+
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+ // Init can buffers
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void init_can_buffer (FuriHalSpiBusHandle * spi ) {
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uint8_t a1 = 0 , a2 = 0 , a3 = 0 ;
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+ uint8_t std = 0 ;
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+ uint8_t ext = 1 ;
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+
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+ uint32_t ulMask = 0x00 , ulFilt = 0x00 ;
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+
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+ write_mf (spi , MCP_RXM0SIDH , ext , ulMask );
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+
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+ write_mf (spi , MCP_RXM1SIDH , ext , ulMask );
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+
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+ write_mf (spi , MCP_RXF0SIDH , ext , ulFilt );
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+
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+ write_mf (spi , MCP_RXF1SIDH , std , ulFilt );
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+
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+ write_mf (spi , MCP_RXF2SIDH , ext , ulFilt );
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+
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+ write_mf (spi , MCP_RXF3SIDH , std , ulFilt );
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+
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+ write_mf (spi , MCP_RXF4SIDH , ext , ulFilt );
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+
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+ write_mf (spi , MCP_RXF5SIDH , std , ulFilt );
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+
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a1 = MCP_TXB0CTRL ;
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a2 = MCP_TXB1CTRL ;
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a3 = MCP_TXB2CTRL ;
@@ -199,9 +256,6 @@ void init_can_buffer(FuriHalSpiBusHandle* spi) {
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a2 ++ ;
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a3 ++ ;
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}
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-
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- set_register (spi , MCP_RXB0CTRL , 0 );
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- set_register (spi , MCP_RXB1CTRL , 0 );
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}
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// This function works to set Registers to initialize the MCP2515
@@ -211,6 +265,15 @@ void set_registers_init(FuriHalSpiBusHandle* spi) {
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set_register (spi , MCP_BFPCTRL , MCP_BxBFS_MASK | MCP_BxBFE_MASK );
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set_register (spi , MCP_TXRTSCTRL , 0x00 );
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+
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+ set_register (spi , MCP_RXB0CTRL , MCP_RXB_BUKT_MASK );
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+ set_register (spi , MCP_RXB1CTRL , 0 );
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+
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+ // Part added
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+ /*modify_register(
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+ spi, MCP_RXB0CTRL, MCP_RXB_RX_MASK | MCP_RXB_BUKT_MASK, MCP_RXB_RX_ANY | MCP_RXB_BUKT_MASK);
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+
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+ modify_register(spi, MCP_RXB1CTRL, MCP_RXB_RX_MASK, MCP_RXB_RX_ANY);*/
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}
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// This function Works to set the Clock and Bitrate of the MCP2515
@@ -298,35 +361,6 @@ void mcp_set_bitrate(FuriHalSpiBusHandle* spi, MCP_BITRATE bitrate, MCP_CLOCK cl
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set_register (spi , MCP_CNF3 , cfg3 );
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}
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- // To write the mask-filters for the chip
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- void write_mf (FuriHalSpiBusHandle * spi , uint8_t address , uint8_t ext , uint32_t id ) {
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- uint16_t canId = (uint16_t )(id & 0x0FFFF );
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- uint8_t bufData [4 ];
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-
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- if (ext ) {
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- bufData [MCP_EID0 ] = (uint8_t )(canId & 0xFF );
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- bufData [MCP_EID8 ] = (uint8_t )(canId >> 8 );
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- canId = (uint16_t )(id >> 16 );
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- bufData [MCP_SIDL ] = (uint8_t )(canId & 0x03 );
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- bufData [MCP_SIDL ] += (uint8_t )((canId & 0x1C ) << 3 );
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- bufData [MCP_SIDL ] |= MCP_TXB_EXIDE_M ;
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- bufData [MCP_SIDH ] = (uint8_t )(canId >> 5 );
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- } else {
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- bufData [MCP_SIDL ] = (uint8_t )((canId & 0x07 ) << 5 );
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- bufData [MCP_SIDH ] = (uint8_t )(canId >> 3 );
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- bufData [MCP_EID0 ] = 0 ;
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- bufData [MCP_EID8 ] = 0 ;
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- }
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-
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- uint8_t instruction [] = {INSTRUCTION_WRITE , address };
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-
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- furi_hal_spi_acquire (spi );
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- furi_hal_spi_bus_tx (spi , instruction , sizeof (instruction ), TIMEOUT_SPI );
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-
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- furi_hal_spi_bus_tx (spi , bufData , 4 , TIMEOUT_SPI );
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- furi_hal_spi_release (spi );
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- }
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-
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// To set a Mask
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void init_mask (MCP2515 * mcp_can , uint8_t num_mask , uint32_t mask ) {
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FuriHalSpiBusHandle * spi = mcp_can -> spi ;
@@ -446,12 +480,13 @@ ERROR_CAN read_can_message(MCP2515* mcp_can, CANFRAME* frame) {
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ERROR_CAN ret = ERROR_OK ;
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FuriHalSpiBusHandle * spi = mcp_can -> spi ;
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- uint8_t status = read_rx_tx_status (spi );
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+ uint8_t status = 0 ;
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+
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+ mcp_get_status (spi , & status );
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if (status & MCP_RX0IF ) {
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read_frame (spi , frame , INSTRUCTION_READ_RX0 );
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modify_register (spi , MCP_CANINTF , MCP_RX0IF , 0 );
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-
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} else if (status & MCP_RX1IF ) {
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read_frame (spi , frame , INSTRUCTION_READ_RX1 );
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modify_register (spi , MCP_CANINTF , MCP_RX1IF , 0 );
@@ -646,6 +681,48 @@ ERROR_CAN send_can_frame(MCP2515* mcp_can, CANFRAME* frame) {
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return send_can_message (spi , frame , free_buffer );
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}
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+ uint8_t read_detection_baudrate (FuriHalSpiBusHandle * spi ) {
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+ uint8_t data_canintf = 0 ;
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+
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+ uint8_t instruction [] = {INSTRUCTION_READ , MCP_CANINTF };
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+ furi_hal_spi_acquire (spi );
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+ furi_hal_spi_bus_tx (spi , instruction , sizeof (instruction ), TIMEOUT_SPI );
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+ furi_hal_spi_bus_rx (spi , & data_canintf , 1 , TIMEOUT_SPI );
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+ furi_hal_spi_release (spi );
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+
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+ return (data_canintf & 0xf0 );
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+ }
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+
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+ // Function to detect the baudrate
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+ ERROR_CAN is_this_bitrate (MCP2515 * mcp_can , MCP_BITRATE bitrate ) {
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+ FuriHalSpiBusHandle * spi = mcp_can -> spi ;
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+ ERROR_CAN ret = ERROR_OK ;
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+
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+ set_config_mode (mcp_can );
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+
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+ mcp_set_bitrate (spi , bitrate , mcp_can -> clck );
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+
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+ set_listen_only_mode (mcp_can );
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+
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+ if (check_receive (mcp_can ) == ERROR_NOMSG ) return ERROR_NOMSG ;
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+
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+ uint8_t data_canintf = 0 ;
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+
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+ uint8_t instruction [] = {INSTRUCTION_READ , MCP_CANINTF };
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+ furi_hal_spi_acquire (spi );
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+ furi_hal_spi_bus_tx (spi , instruction , sizeof (instruction ), TIMEOUT_SPI );
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+ furi_hal_spi_bus_rx (spi , & data_canintf , 1 , TIMEOUT_SPI );
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+ furi_hal_spi_release (spi );
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+
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+ data_canintf &= 0x80 ;
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+
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+ if (data_canintf == 0x80 ) ret = ERROR_FAIL ;
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+ set_register (spi , MCP_CANINTF , 0 );
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+
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+ return ret ;
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+ }
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+
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// This function works to alloc the struct
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MCP2515 * mcp_alloc (MCP_MODE mode , MCP_CLOCK clck , MCP_BITRATE bitrate ) {
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MCP2515 * mcp_can = malloc (sizeof (MCP2515 ));
@@ -656,12 +733,18 @@ MCP2515* mcp_alloc(MCP_MODE mode, MCP_CLOCK clck, MCP_BITRATE bitrate) {
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return mcp_can ;
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}
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- // To free
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- void free_mcp2515 (MCP2515 * mcp_can ) {
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+ // To deinit
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+ void deinit_mcp2515 (MCP2515 * mcp_can ) {
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mcp_reset (mcp_can -> spi );
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furi_hal_spi_bus_handle_deinit (mcp_can -> spi );
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}
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+ // free instance
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+ void free_mcp2515 (MCP2515 * mcp_can ) {
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+ free (mcp_can -> spi );
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+ free (mcp_can );
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+ }
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+
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// This function starts the SPI communication and set the MCP2515 device
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ERROR_CAN mcp2515_start (MCP2515 * mcp_can ) {
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furi_hal_spi_bus_handle_init (mcp_can -> spi );
@@ -670,6 +753,8 @@ ERROR_CAN mcp2515_start(MCP2515* mcp_can) {
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mcp_reset (mcp_can -> spi );
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+ set_new_mode (mcp_can , MODE_CONFIG );
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+
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mcp_set_bitrate (mcp_can -> spi , mcp_can -> bitRate , mcp_can -> clck );
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init_can_buffer (mcp_can -> spi );
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