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CharlesWu465Locus Wei-Han Chen
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Mina-Chou
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andes: perf: add andes event to JSON file (torvalds#200)
Add andes event to JSON file for a[x]2[5|7], a[x]45 and ax65 Reformed from the following patches on ast-v5_4_0-branch: - (a598976) tools: perf: andes: remove Andes L2C events from ax[25|45|65]/firmware.json (torvalds#205) Co-authored-by: Locus Wei-Han Chen <[email protected]> Reviewed-on: https://gitea.andestech.com/RD-SW/linux/pulls/200 Reviewed-by: Locus Wei-Han Chen <[email protected]> Reviewed-by: Peter Yu-Chien Lin <[email protected]>
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‎tools/perf/pmu-events/arch/riscv/andes/ax25/firmware.json

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[
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{
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"ArchStdEvent": "FW_MISALIGNED_LOAD"
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},
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{
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"ArchStdEvent": "FW_MISALIGNED_STORE"
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},
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{
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"ArchStdEvent": "FW_ACCESS_LOAD"
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},
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{
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"ArchStdEvent": "FW_ACCESS_STORE"
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},
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{
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"ArchStdEvent": "FW_ILLEGAL_INSN"
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},
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{
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"ArchStdEvent": "FW_SET_TIMER"
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},
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{
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"ArchStdEvent": "FW_IPI_SENT"
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},
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{
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"ArchStdEvent": "FW_IPI_RECEIVED"
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},
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{
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"ArchStdEvent": "FW_FENCE_I_SENT"
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},
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{
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"ArchStdEvent": "FW_FENCE_I_RECEIVED"
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},
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{
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"ArchStdEvent": "FW_SFENCE_VMA_SENT"
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},
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{
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"ArchStdEvent": "FW_SFENCE_VMA_RECEIVED"
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},
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{
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"ArchStdEvent": "FW_SFENCE_VMA_RECEIVED"
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},
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{
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"ArchStdEvent": "FW_SFENCE_VMA_ASID_RECEIVED"
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},
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{
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"ArchStdEvent": "FW_HFENCE_GVMA_SENT"
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},
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{
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"ArchStdEvent": "FW_HFENCE_GVMA_RECEIVED"
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},
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{
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"ArchStdEvent": "FW_HFENCE_GVMA_VMID_SENT"
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},
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{
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"ArchStdEvent": "FW_HFENCE_GVMA_VMID_RECEIVED"
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},
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{
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"ArchStdEvent": "FW_HFENCE_VVMA_SENT"
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},
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{
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"ArchStdEvent": "FW_HFENCE_VVMA_RECEIVED"
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},
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{
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"ArchStdEvent": "FW_HFENCE_VVMA_ASID_SENT"
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},
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{
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"ArchStdEvent": "FW_HFENCE_VVMA_ASID_RECEIVED"
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}
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]

‎tools/perf/pmu-events/arch/riscv/andes/ax25/riscvstd.json

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[
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{
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"EventCode": "0x10",
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"EventName": "cycle_count",
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"BriefDescription": "Cycle counts"
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},
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{
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"EventCode": "0x20",
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"EventName": "inst_count",
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"BriefDescription": "Retired instruction counts"
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},
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{
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"EventCode": "0x30",
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"EventName": "int_load_inst",
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"BriefDescription": "Integer load instructions"
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},
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{
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"EventCode": "0x40",
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"EventName": "int_store_inst",
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"BriefDescription": "Integer store instructions"
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},
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{
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"EventCode": "0x50",
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"EventName": "atomic_mem_op",
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"BriefDescription": "Atomic memory operation"
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},
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{
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"EventCode": "0x60",
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"EventName": "sys_inst",
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"BriefDescription": "System instructions"
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},
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{
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"EventCode": "0x70",
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"EventName": "int_compute_inst",
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"BriefDescription": "Integer computational instruction"
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},
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{
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"EventCode": "0x80",
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"EventName": "condition_br",
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"BriefDescription": "Conditional branch"
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},
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{
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"EventCode": "0x90",
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"EventName": "taken_condition_br",
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"BriefDescription": "Taken conditional branch"
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},
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{
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"EventCode": "0xA0",
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"EventName": "jal_inst",
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"BriefDescription": "JAL instruction"
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},
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{
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"EventCode": "0xB0",
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"EventName": "jalr_inst",
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"BriefDescription": "JALR instruction"
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},
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{
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"EventCode": "0xC0",
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"EventName": "ret_inst",
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"BriefDescription": "Return instruction"
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},
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{
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"EventCode": "0xD0",
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"EventName": "control_trans_inst",
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"BriefDescription": "Control transfer instruction"
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},
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{
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"EventCode": "0xE0",
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"EventName": "ex9_inst",
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"BriefDescription": "EX9 instruction"
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},
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{
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"EventCode": "0xF0",
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"EventName": "int_mul_inst",
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"BriefDescription": "Integer multiplication instruction"
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},
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{
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"EventCode": "0x100",
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"EventName": "int_div_rem_inst",
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"BriefDescription": "Integer division/remainder instruction"
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},
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{
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"EventCode": "0x110",
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"EventName": "float_load_inst",
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"BriefDescription": "Floating-point load instruction"
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},
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{
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"EventCode": "0x120",
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"EventName": "float_store_inst",
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"BriefDescription": "Floating-point store instruction"
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},
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{
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"EventCode": "0x130",
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"EventName": "float_add_sub_inst",
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"BriefDescription": "Floating-point addition/subtraction"
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},
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{
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"EventCode": "0x140",
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"EventName": "float_mul_inst",
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"BriefDescription": "Floating-point multiplication"
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},
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{
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"EventCode": "0x150",
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"EventName": "float_fused_muladd_inst",
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"BriefDescription": "Floating-point fused multiply-add"
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},
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{
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"EventCode": "0x160",
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"EventName": "float_div_sqrt_inst",
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"BriefDescription": "Floating-point division or square-root"
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},
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{
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"EventCode": "0x170",
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"EventName": "other_float_inst",
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"BriefDescription": "Other floating-point instruction"
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},
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{
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"EventCode": "0x180",
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"EventName": "integer_mul_and_sub_inst_count",
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"BriefDescription": "Integer multiplication and add/sub instruction count"
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},
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{
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"EventCode": "0x01",
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"EventName": "ilm_access",
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"BriefDescription": "ILM access"
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},
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{
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"EventCode": "0x11",
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"EventName": "dlm_access",
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"BriefDescription": "DLM access"
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},
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{
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"EventCode": "0x21",
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"EventName": "icache_access",
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"BriefDescription": "ICACHE access"
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},
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{
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"EventCode": "0x31",
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"EventName": "icache_miss",
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"BriefDescription": "ICACHE miss"
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},
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{
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"EventCode": "0x41",
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"EventName": "dcache_access",
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"BriefDescription": "DCACHE access"
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},
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{
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"EventCode": "0x51",
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"EventName": "dcache_miss",
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"BriefDescription": "DCACHE miss"
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},
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{
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"EventCode": "0x61",
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"EventName": "dcache_load_access",
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"BriefDescription": "DCACHE load access"
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},
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{
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"EventCode": "0x71",
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"EventName": "dcache_load_miss",
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"BriefDescription": "DCACHE load miss"
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},
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{
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"EventCode": "0x81",
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"EventName": "dcache_store_access",
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"BriefDescription": "DCACHE store access"
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},
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{
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"EventCode": "0x91",
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"EventName": "dcache_store_miss",
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"BriefDescription": "DCACHE store miss"
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},
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{
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"EventCode": "0xA1",
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"EventName": "dcache_wb",
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"BriefDescription": "DCACHE writeback"
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},
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{
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"EventCode": "0xB1",
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"EventName": "cycle_wait_icache_fill",
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"BriefDescription": "Cycles waiting for ICACHE fill data"
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},
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{
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"EventCode": "0xC1",
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"EventName": "cycle_wait_dcache_fill",
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"BriefDescription": "Cycles waiting for DCACHE fill data"
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},
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{
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"EventCode": "0xD1",
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"EventName": "uncached_ifetch_from_bus",
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"BriefDescription": "Uncached ifetch data access from bus"
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},
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{
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"EventCode": "0xE1",
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"EventName": "uncached_load_from_bus",
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"BriefDescription": "Uncached load data access from bus"
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},
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{
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"EventCode": "0xF1",
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"EventName": "cycle_wait_uncached_ifetch",
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"BriefDescription": "Cycles waiting for uncached ifetch data from bus"
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},
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{
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"EventCode": "0x101",
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"EventName": "cycle_wait_uncached_load",
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"BriefDescription": "Cycles waiting for uncached load data from bus"
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},
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{
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"EventCode": "0x111",
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"EventName": "main_itlb_access",
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"BriefDescription": "Main ITLB access"
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},
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{
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"EventCode": "0x121",
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"EventName": "main_itlb_miss",
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"BriefDescription": "Main ITLB miss"
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},
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{
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"EventCode": "0x131",
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"EventName": "main_dtlb_access",
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"BriefDescription": "Main DTLB access"
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},
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{
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"EventCode": "0x141",
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"EventName": "main_dtlb_miss",
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"BriefDescription": "Main DTLB miss"
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},
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{
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"EventCode": "0x151",
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"EventName": "cycle_wait_itlb_fill",
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"BriefDescription": "Cycles waiting for Main ITLB fill data"
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},
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{
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"EventCode": "0x161",
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"EventName": "pipe_stall_cycle_dtlb_miss",
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"BriefDescription": "Pipeline stall cycles caused by Main DTLB miss"
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},
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{
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"EventCode": "0x02",
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"EventName": "mispredict_condition_br",
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"BriefDescription": "Misprediction of conditional branches"
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},
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{
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"EventCode": "0x12",
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"EventName": "mispredict_take_condition_br",
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"BriefDescription": "Misprediction of taken conditional branches"
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},
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{
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"EventCode": "0x22",
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"EventName": "mispredict_target_ret_inst",
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"BriefDescription": "Misprediction of targets of Return instructions"
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},
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{
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"EventCode": "0x32",
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"EventName": "replay_las_sas",
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"BriefDescription": "Replay for load-after-store or store-after-store cases"
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}
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]

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