Revert "Implement PM4CondExec (shadps4-emu#3046)"

This reverts commit 91d2945.

Author: diegolix29

src/video_core/amdgpu/liverpool.cpp

@@ -774,19 +774,6 @@ Liverpool::Task Liverpool::ProcessGraphics(std::span<const u32> dcb, std::span<c
                 LOG_WARNING(Render_Vulkan, "Unimplemented IT_GET_LOD_STATS");
                 break;
             }
-            case PM4ItOpcode::CondExec: {
-                const auto* cond_exec = reinterpret_cast<const PM4CmdCondExec*>(header);
-                if (cond_exec->command.Value() != 0) {
-                    LOG_WARNING(Render, "IT_COND_EXEC used a reserved command");
-                }
-                const auto skip = *cond_exec->Address() == false;
-                if (skip) {
-                    dcb = NextPacket(dcb,
-                                     header->type3.NumWords() + 1 + cond_exec->exec_count.Value());
-                    continue;
-                }
-                break;
-            }
             default:
                 UNREACHABLE_MSG("Unknown PM4 type 3 opcode {:#x} with count {}",
                                 static_cast<u32>(opcode), count);

src/video_core/amdgpu/pm4_cmds.h

@@ -1159,25 +1159,4 @@ struct PM4CmdMemSemaphore {
     }
 };
 
-struct PM4CmdCondExec {
-    PM4Type3Header header;
-    union {
-        BitField<2, 30, u32> bool_addr_lo; ///< low 32 address bits for the block in memory from
-                                           ///< where the CP will fetch the condition
-    };
-    union {
-        BitField<0, 16, u32> bool_addr_hi; ///< high address bits for the condition
-        BitField<28, 4, u32> command;
-    };
-    union {
-        BitField<0, 14, u32> exec_count; ///< Number of DWords that the CP will skip
-                                         ///< if bool pointed to is zero
-    };
-
-    bool* Address() const {
-        return std::bit_cast<bool*>(u64(bool_addr_hi.Value()) << 32 | u64(bool_addr_lo.Value())
-                                                                          << 2);
-    }
-};
-
 } // namespace AmdGpu