Various additional cleanup to ensure tests are all passing

Author: tannergooding

src/coreclr/jit/hwintrinsic.cpp

@@ -1571,11 +1571,7 @@ GenTree* Compiler::addRangeCheckForHWIntrinsic(GenTree* immOp, int immLowerBound
 //    true iff the given instruction set is enabled via configuration (environment variables, etc.).
 bool Compiler::compSupportsHWIntrinsic(CORINFO_InstructionSet isa)
 {
-    return compHWIntrinsicDependsOn(isa) && (
-#ifdef DEBUG
-                                                JitConfig.EnableIncompleteISAClass() ||
-#endif
-                                                HWIntrinsicInfo::isFullyImplementedIsa(isa));
+    return compHWIntrinsicDependsOn(isa);
 }
 
 //------------------------------------------------------------------------
@@ -1919,7 +1915,7 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic        intrinsic,
 
     if (simdBaseJitType == CORINFO_TYPE_UNDEF)
     {
-        if ((category == HW_Category_Scalar) || HWIntrinsicInfo::isScalarIsa(isa))
+        if ((category == HW_Category_Scalar) || (category == HW_Category_Special))
         {
             simdBaseJitType = sig->retType;
 
@@ -1984,7 +1980,7 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic        intrinsic,
 #endif // TARGET_ARM64
 
     // Immediately return if the category is other than scalar/special and this is not a supported base type.
-    if ((category != HW_Category_Special) && (category != HW_Category_Scalar) && !HWIntrinsicInfo::isScalarIsa(isa) &&
+    if ((category != HW_Category_Special) && (category != HW_Category_Scalar) &&
         !isSupportedBaseType(intrinsic, simdBaseJitType))
     {
         return nullptr;

src/coreclr/jit/hwintrinsic.h

@@ -547,8 +547,6 @@ struct HWIntrinsicInfo
 #endif
 
     static bool isImmOp(NamedIntrinsic id, const GenTree* op);
-    static bool isFullyImplementedIsa(CORINFO_InstructionSet isa);
-    static bool isScalarIsa(CORINFO_InstructionSet isa);
 
 #ifdef TARGET_XARCH
     static bool                isAVX2GatherIntrinsic(NamedIntrinsic id);

src/coreclr/jit/hwintrinsicarm64.cpp

@@ -187,74 +187,6 @@ int HWIntrinsicInfo::lookupIval(NamedIntrinsic id)
     }
     return -1;
 }
-//------------------------------------------------------------------------
-// isFullyImplementedIsa: Gets a value that indicates whether the InstructionSet is fully implemented
-//
-// Arguments:
-//    isa - The InstructionSet to check
-//
-// Return Value:
-//    true if isa is supported; otherwise, false
-bool HWIntrinsicInfo::isFullyImplementedIsa(CORINFO_InstructionSet isa)
-{
-    switch (isa)
-    {
-        // These ISAs are fully implemented
-        case InstructionSet_AdvSimd:
-        case InstructionSet_AdvSimd_Arm64:
-        case InstructionSet_Aes:
-        case InstructionSet_Aes_Arm64:
-        case InstructionSet_ArmBase:
-        case InstructionSet_ArmBase_Arm64:
-        case InstructionSet_Crc32:
-        case InstructionSet_Crc32_Arm64:
-        case InstructionSet_Dp:
-        case InstructionSet_Dp_Arm64:
-        case InstructionSet_Rdm:
-        case InstructionSet_Rdm_Arm64:
-        case InstructionSet_Sha1:
-        case InstructionSet_Sha1_Arm64:
-        case InstructionSet_Sha256:
-        case InstructionSet_Sha256_Arm64:
-        case InstructionSet_Sve:
-        case InstructionSet_Sve_Arm64:
-        case InstructionSet_Sve2:
-        case InstructionSet_Sve2_Arm64:
-        case InstructionSet_Vector64:
-        case InstructionSet_Vector128:
-            return true;
-
-        default:
-            return false;
-    }
-}
-
-//------------------------------------------------------------------------
-// isScalarIsa: Gets a value that indicates whether the InstructionSet is scalar
-//
-// Arguments:
-//    isa - The InstructionSet to check
-//
-// Return Value:
-//    true if isa is scalar; otherwise, false
-bool HWIntrinsicInfo::isScalarIsa(CORINFO_InstructionSet isa)
-{
-    switch (isa)
-    {
-        case InstructionSet_ArmBase:
-        case InstructionSet_ArmBase_Arm64:
-        case InstructionSet_Crc32:
-        case InstructionSet_Crc32_Arm64:
-        {
-            return true;
-        }
-
-        default:
-        {
-            return false;
-        }
-    }
-}
 
 //------------------------------------------------------------------------
 // getHWIntrinsicImmOps: Gets the immediate Ops for an intrinsic
@@ -677,8 +609,6 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic        intrinsic,
     }
 
     bool isScalar = (category == HW_Category_Scalar);
-    assert(!HWIntrinsicInfo::isScalarIsa(HWIntrinsicInfo::lookupIsa(intrinsic)));
-
     assert(numArgs >= 0);
 
     var_types simdBaseType = JitType2PreciseVarType(simdBaseJitType);

src/coreclr/jit/hwintrinsiccodegenxarch.cpp

@@ -2559,7 +2559,7 @@ void CodeGen::genSse42Intrinsic(GenTreeHWIntrinsic* node, insOpts instOptions)
             {
                 ins = INS_crc32_apx;
             }
-#endif                                                               // TARGET_AMD64
+#endif // TARGET_AMD64
 
             if ((baseType == TYP_UBYTE) || (baseType == TYP_USHORT)) // baseType is the type of the second argument
             {
@@ -2648,23 +2648,24 @@ void CodeGen::genAvxFamilyIntrinsic(GenTreeHWIntrinsic* node, insOpts instOption
 
     var_types baseType   = node->GetSimdBaseType();
     var_types targetType = node->TypeGet();
-    emitAttr  attr       = emitTypeSize(targetType);
+    emitAttr  attr       = EA_UNKNOWN;
 
     if (baseType == TYP_UNKNOWN)
     {
         baseType = targetType;
+        attr     = emitTypeSize(targetType);
     }
     else
     {
         attr = emitActualTypeSize(Compiler::getSIMDTypeForSize(node->GetSimdSize()));
     }
 
-    instruction ins        = HWIntrinsicInfo::lookupIns(intrinsicId, baseType, compiler);
-    size_t      numArgs    = node->GetOperandCount();
-    GenTree*    op1        = node->Op(1);
-    regNumber   op1Reg     = REG_NA;
-    regNumber   targetReg  = node->GetRegNum();
-    emitter*    emit       = GetEmitter();
+    instruction ins       = HWIntrinsicInfo::lookupIns(intrinsicId, baseType, compiler);
+    size_t      numArgs   = node->GetOperandCount();
+    GenTree*    op1       = node->Op(1);
+    regNumber   op1Reg    = REG_NA;
+    regNumber   targetReg = node->GetRegNum();
+    emitter*    emit      = GetEmitter();
 
     genConsumeMultiOpOperands(node);