@@ -62,25 +62,6 @@ static void assertIsContainableHWIntrinsicOp(Lowering* lowering,
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#endif // DEBUG
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}
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- // ------------------------------------------------------------------------
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- // genIsTableDrivenHWIntrinsic:
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- //
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- // Arguments:
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- // category - category of a HW intrinsic
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- //
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- // Return Value:
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- // returns true if this category can be table-driven in CodeGen
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- //
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- static bool genIsTableDrivenHWIntrinsic (NamedIntrinsic intrinsicId, HWIntrinsicCategory category)
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- {
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- // TODO - make more categories to the table-driven framework
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- // HW_Category_Helper and HW_Flag_SpecialCodeGen usually need manual codegen
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- const bool tableDrivenCategory =
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- (category != HW_Category_Special) && (category != HW_Category_Scalar) && (category != HW_Category_Helper);
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- const bool tableDrivenFlag = !HWIntrinsicInfo::HasSpecialCodegen (intrinsicId);
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- return tableDrivenCategory && tableDrivenFlag;
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- }
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-
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// ------------------------------------------------------------------------
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// AddEmbRoundingMode: Adds the embedded rounding mode to the insOpts
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//
@@ -408,7 +389,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
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assert (HWIntrinsicInfo::RequiresCodegen (intrinsicId));
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assert (!HWIntrinsicInfo::NeedsNormalizeSmallTypeToInt (intrinsicId) || !varTypeIsSmall (node->GetSimdBaseType ()));
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- bool isTableDriven = genIsTableDrivenHWIntrinsic (intrinsicId, category);
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+ bool isTableDriven = HWIntrinsicInfo:: genIsTableDrivenHWIntrinsic (intrinsicId, category);
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insOpts instOptions = INS_OPTS_NONE;
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if (GetEmitter ()->UseEvexEncoding ())
@@ -659,6 +640,8 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
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{
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// Until we improve the handling of addressing modes in the emitter, we'll create a
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// temporary GT_IND to generate code with.
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+
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+ assert (instOptions == INS_OPTS_NONE);
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GenTreeIndir load = indirForm (node->TypeGet (), op1);
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emit->emitInsLoadInd (ins, simdSize, node->GetRegNum (), &load);
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}
@@ -703,6 +686,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
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// Until we improve the handling of addressing modes in the emitter, we'll create a
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// temporary GT_STORE_IND to generate code with.
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+ assert (instOptions == INS_OPTS_NONE);
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GenTreeStoreInd store = storeIndirForm (node->TypeGet (), op1, op2);
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emit->emitInsStoreInd (ins, simdSize, &store);
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break ;
@@ -834,10 +818,9 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
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}
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else if (category == HW_Category_MemoryStore)
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{
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- assert (instOptions == INS_OPTS_NONE);
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-
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// The Mask instructions do not currently support containment of the address.
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assert (!op2->isContained ());
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+
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if (intrinsicId == NI_AVX_MaskStore || intrinsicId == NI_AVX2_MaskStore)
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{
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emit->emitIns_AR_R_R (ins, simdSize, op2Reg, op3Reg, op1Reg, 0 , instOptions);
@@ -1340,9 +1323,22 @@ void CodeGen::genHWIntrinsic_R_R_RM_R(GenTreeHWIntrinsic* node, instruction ins,
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GenTree* op3 = node->Op (3 );
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emitter* emit = GetEmitter ();
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- regNumber op1Reg = op1-> GetRegNum () ;
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+ regNumber op1Reg = REG_NA ;
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regNumber op3Reg = op3->GetRegNum ();
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+ if (op1->isContained ())
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+ {
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+ assert (node->GetHWIntrinsicId () == NI_AVX512_BlendVariableMask);
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+ assert (op1->IsVectorZero ());
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+
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+ instOptions = AddEmbMaskingMode (instOptions, REG_K0, true );
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+ op1Reg = targetReg;
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+ }
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+ else
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+ {
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+ op1Reg = op1->GetRegNum ();
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+ }
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+
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assert (targetReg != REG_NA);
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assert (op1Reg != REG_NA);
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assert (op3Reg != REG_NA);
@@ -1693,7 +1689,7 @@ void CodeGen::genNonTableDrivenHWIntrinsicsJumpTableFallback(GenTreeHWIntrinsic*
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assert (HWIntrinsicInfo::IsEmbRoundingCompatible (intrinsicId));
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assert (!lastOp->isContained ());
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- assert (!genIsTableDrivenHWIntrinsic (intrinsicId, category));
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+ assert (!HWIntrinsicInfo:: genIsTableDrivenHWIntrinsic (intrinsicId, category));
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var_types baseType = node->GetSimdBaseType ();
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emitAttr attr = emitActualTypeSize (Compiler::getSIMDTypeForSize (node->GetSimdSize ()));
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