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Reduce calli address spilling (#85349)
1 parent a08818e commit 0f06ede

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3 files changed

+5
-4
lines changed

3 files changed

+5
-4
lines changed

src/coreclr/jit/gentree.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25862,7 +25862,7 @@ bool GenTreeLclFld::IsOffsetMisaligned() const
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bool GenTree::IsInvariant() const
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{
25865-
return OperIsConst() || OperIs(GT_LCL_ADDR);
25865+
return OperIsConst() || OperIs(GT_LCL_ADDR) || OperIs(GT_FTN_ADDR);
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}
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//------------------------------------------------------------------------

src/coreclr/jit/importer.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12758,7 +12758,7 @@ void Compiler::impFixPredLists()
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//
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bool Compiler::impIsInvariant(const GenTree* tree)
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{
12761-
return tree->OperIsConst() || impIsAddressInLocal(tree);
12761+
return tree->OperIsConst() || impIsAddressInLocal(tree) || tree->OperIs(GT_FTN_ADDR);
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}
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//------------------------------------------------------------------------

src/coreclr/jit/importercalls.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1631,8 +1631,9 @@ GenTreeCall* Compiler::impImportIndirectCall(CORINFO_SIG_INFO* sig, const DebugI
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* it may cause registered args to be spilled. Simply spill it.
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*/
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1634-
// Ignore this trivial case.
1635-
if (impStackTop().val->gtOper != GT_LCL_VAR)
1634+
// Ignore no args or trivial cases.
1635+
if ((sig->callConv != CORINFO_CALLCONV_DEFAULT || sig->totalILArgs() > 0) &&
1636+
!impStackTop().val->OperIs(GT_LCL_VAR, GT_FTN_ADDR, GT_CNS_INT))
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{
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impSpillStackEntry(verCurrentState.esStackDepth - 1,
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BAD_VAR_NUM DEBUGARG(false) DEBUGARG("impImportIndirectCall"));

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