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Various additional cleanup to ensure tests are all passing
1 parent 5039719 commit 3211a43

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8 files changed

+12
-118
lines changed

8 files changed

+12
-118
lines changed

src/coreclr/jit/hwintrinsic.cpp

Lines changed: 3 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1571,11 +1571,7 @@ GenTree* Compiler::addRangeCheckForHWIntrinsic(GenTree* immOp, int immLowerBound
15711571
// true iff the given instruction set is enabled via configuration (environment variables, etc.).
15721572
bool Compiler::compSupportsHWIntrinsic(CORINFO_InstructionSet isa)
15731573
{
1574-
return compHWIntrinsicDependsOn(isa) && (
1575-
#ifdef DEBUG
1576-
JitConfig.EnableIncompleteISAClass() ||
1577-
#endif
1578-
HWIntrinsicInfo::isFullyImplementedIsa(isa));
1574+
return compHWIntrinsicDependsOn(isa);
15791575
}
15801576

15811577
//------------------------------------------------------------------------
@@ -1919,7 +1915,7 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
19191915

19201916
if (simdBaseJitType == CORINFO_TYPE_UNDEF)
19211917
{
1922-
if ((category == HW_Category_Scalar) || HWIntrinsicInfo::isScalarIsa(isa))
1918+
if ((category == HW_Category_Scalar) || (category == HW_Category_Special))
19231919
{
19241920
simdBaseJitType = sig->retType;
19251921

@@ -1984,7 +1980,7 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
19841980
#endif // TARGET_ARM64
19851981

19861982
// Immediately return if the category is other than scalar/special and this is not a supported base type.
1987-
if ((category != HW_Category_Special) && (category != HW_Category_Scalar) && !HWIntrinsicInfo::isScalarIsa(isa) &&
1983+
if ((category != HW_Category_Special) && (category != HW_Category_Scalar) &&
19881984
!isSupportedBaseType(intrinsic, simdBaseJitType))
19891985
{
19901986
return nullptr;

src/coreclr/jit/hwintrinsic.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -547,8 +547,6 @@ struct HWIntrinsicInfo
547547
#endif
548548

549549
static bool isImmOp(NamedIntrinsic id, const GenTree* op);
550-
static bool isFullyImplementedIsa(CORINFO_InstructionSet isa);
551-
static bool isScalarIsa(CORINFO_InstructionSet isa);
552550

553551
#ifdef TARGET_XARCH
554552
static bool isAVX2GatherIntrinsic(NamedIntrinsic id);

src/coreclr/jit/hwintrinsicarm64.cpp

Lines changed: 0 additions & 70 deletions
Original file line numberDiff line numberDiff line change
@@ -187,74 +187,6 @@ int HWIntrinsicInfo::lookupIval(NamedIntrinsic id)
187187
}
188188
return -1;
189189
}
190-
//------------------------------------------------------------------------
191-
// isFullyImplementedIsa: Gets a value that indicates whether the InstructionSet is fully implemented
192-
//
193-
// Arguments:
194-
// isa - The InstructionSet to check
195-
//
196-
// Return Value:
197-
// true if isa is supported; otherwise, false
198-
bool HWIntrinsicInfo::isFullyImplementedIsa(CORINFO_InstructionSet isa)
199-
{
200-
switch (isa)
201-
{
202-
// These ISAs are fully implemented
203-
case InstructionSet_AdvSimd:
204-
case InstructionSet_AdvSimd_Arm64:
205-
case InstructionSet_Aes:
206-
case InstructionSet_Aes_Arm64:
207-
case InstructionSet_ArmBase:
208-
case InstructionSet_ArmBase_Arm64:
209-
case InstructionSet_Crc32:
210-
case InstructionSet_Crc32_Arm64:
211-
case InstructionSet_Dp:
212-
case InstructionSet_Dp_Arm64:
213-
case InstructionSet_Rdm:
214-
case InstructionSet_Rdm_Arm64:
215-
case InstructionSet_Sha1:
216-
case InstructionSet_Sha1_Arm64:
217-
case InstructionSet_Sha256:
218-
case InstructionSet_Sha256_Arm64:
219-
case InstructionSet_Sve:
220-
case InstructionSet_Sve_Arm64:
221-
case InstructionSet_Sve2:
222-
case InstructionSet_Sve2_Arm64:
223-
case InstructionSet_Vector64:
224-
case InstructionSet_Vector128:
225-
return true;
226-
227-
default:
228-
return false;
229-
}
230-
}
231-
232-
//------------------------------------------------------------------------
233-
// isScalarIsa: Gets a value that indicates whether the InstructionSet is scalar
234-
//
235-
// Arguments:
236-
// isa - The InstructionSet to check
237-
//
238-
// Return Value:
239-
// true if isa is scalar; otherwise, false
240-
bool HWIntrinsicInfo::isScalarIsa(CORINFO_InstructionSet isa)
241-
{
242-
switch (isa)
243-
{
244-
case InstructionSet_ArmBase:
245-
case InstructionSet_ArmBase_Arm64:
246-
case InstructionSet_Crc32:
247-
case InstructionSet_Crc32_Arm64:
248-
{
249-
return true;
250-
}
251-
252-
default:
253-
{
254-
return false;
255-
}
256-
}
257-
}
258190

259191
//------------------------------------------------------------------------
260192
// getHWIntrinsicImmOps: Gets the immediate Ops for an intrinsic
@@ -677,8 +609,6 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic,
677609
}
678610

679611
bool isScalar = (category == HW_Category_Scalar);
680-
assert(!HWIntrinsicInfo::isScalarIsa(HWIntrinsicInfo::lookupIsa(intrinsic)));
681-
682612
assert(numArgs >= 0);
683613

684614
var_types simdBaseType = JitType2PreciseVarType(simdBaseJitType);

src/coreclr/jit/hwintrinsiccodegenxarch.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2648,11 +2648,12 @@ void CodeGen::genAvxFamilyIntrinsic(GenTreeHWIntrinsic* node, insOpts instOption
26482648

26492649
var_types baseType = node->GetSimdBaseType();
26502650
var_types targetType = node->TypeGet();
2651-
emitAttr attr = emitTypeSize(targetType);
2651+
emitAttr attr = EA_UNKNOWN;
26522652

26532653
if (baseType == TYP_UNKNOWN)
26542654
{
26552655
baseType = targetType;
2656+
attr = emitTypeSize(targetType);
26562657
}
26572658
else
26582659
{

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