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hathachhathach
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Merge pull request #2271 from antoniovazquezblanco/stm32h750dk
stm32h750-dk support
2 parents 1eb6ce7 + 46b0ddc commit 390c109

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‎hw/bsp/stm32h7/boards/stm32h750bdk/board.cmake

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set(MCU_VARIANT stm32h750xx)
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set(JLINK_DEVICE stm32h750xb_m7)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${MCU_VARIANT}_flash_CM7.ld)
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set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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STM32H750xx
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HSE_VALUE=25000000
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CORE_CM7
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# default to PORT 0
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BOARD_TUD_RHPORT=0
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BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
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)
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endfunction()

‎hw/bsp/stm32h7/boards/stm32h750bdk/board.h

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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef BOARD_H_
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#define BOARD_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define LED_PORT GPIOJ
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#define LED_PIN GPIO_PIN_2
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#define LED_STATE_ON 1
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// Blue push-button
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#define BUTTON_PORT GPIOC
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#define BUTTON_PIN GPIO_PIN_13
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#define BUTTON_STATE_ACTIVE 1
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// UART
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#define UART_DEV USART3
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#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
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#define UART_GPIO_PORT GPIOB
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#define UART_GPIO_AF GPIO_AF7_USART3
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#define UART_TX_PIN GPIO_PIN_10
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#define UART_RX_PIN GPIO_PIN_11
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// VBUS Sense detection
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#define OTG_FS_VBUS_SENSE 1
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#define OTG_HS_VBUS_SENSE 0
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// USB HS External PHY Pin: CLK, STP, DIR, NXT, D0-D7
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#define ULPI_PINS \
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{GPIOA, GPIO_PIN_3 }, {GPIOA, GPIO_PIN_5 }, {GPIOB, GPIO_PIN_0 }, {GPIOB, GPIO_PIN_1 }, \
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{GPIOB, GPIO_PIN_5 }, {GPIOB, GPIO_PIN_10}, {GPIOB, GPIO_PIN_11}, {GPIOB, GPIO_PIN_12}, \
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{GPIOB, GPIO_PIN_13}, {GPIOC, GPIO_PIN_0 }, {GPIOH, GPIO_PIN_4 }, {GPIOI, GPIO_PIN_11}
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//--------------------------------------------------------------------+
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// RCC Clock
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//--------------------------------------------------------------------+
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static inline void SystemClock_Config(void)
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{
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RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
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RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
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/*!< Supply configuration update enable */
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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/* The voltage scaling allows optimizing the power consumption when the
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device is clocked below the maximum system frequency, to update the
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voltage scaling value regarding system frequency refer to product
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datasheet. */
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) {}
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/* Enable HSE Oscillator and activate PLL with HSE as source */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
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RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
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RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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/* PLL1 for System Clock */
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RCC_OscInitStruct.PLL.PLLM = 5;
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RCC_OscInitStruct.PLL.PLLN = 160;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLQ = 4;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
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HAL_RCC_OscConfig(&RCC_OscInitStruct);
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/* PLL3 for USB Clock */
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PeriphClkInitStruct.PLL3.PLL3M = 25;
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PeriphClkInitStruct.PLL3.PLL3N = 336;
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PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
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PeriphClkInitStruct.PLL3.PLL3P = 2;
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PeriphClkInitStruct.PLL3.PLL3R = 2;
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PeriphClkInitStruct.PLL3.PLL3Q = 7;
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
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PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
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HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
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/* Select PLL as system clock source and configure bus clocks dividers */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | \
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RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_D3PCLK1);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1;
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HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
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/*activate CSI clock mondatory for I/O Compensation Cell*/
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__HAL_RCC_CSI_ENABLE() ;
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/* Enable SYSCFG clock mondatory for I/O Compensation Cell */
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__HAL_RCC_SYSCFG_CLK_ENABLE() ;
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/* Enables the I/O Compensation Cell */
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HAL_EnableCompensationCell();
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}
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static inline void board_stm32h7_post_init(void)
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{
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// For this board does nothing
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}
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#ifdef __cplusplus
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}
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#endif
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#endif

‎hw/bsp/stm32h7/boards/stm32h750bdk/board.mk

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# STM32H745I-DISCO uses OTG_FS
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# FIXME: Reset enumerates, un/replug USB plug does not enumerate
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CFLAGS += -DSTM32H750xx -DCORE_CM7 -DHSE_VALUE=25000000
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# Default is FulSpeed port
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PORT ?= 0
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# GCC
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SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32h750xx.s
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LD_FILE_GCC = $(BOARD_PATH)/stm32h750xx_flash_CM7.ld
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# IAR
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SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32h750xx.s
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LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h750xx_flash.icf
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# For flash-jlink target
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JLINK_DEVICE = stm32h750xb_m7
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# flash target using on-board stlink
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flash: flash-stlink

‎hw/bsp/stm32h7/boards/stm32h750bdk/stm32h750xx_flash_CM7.ld

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/*
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******************************************************************************
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**
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** File : LinkerScript.ld
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**
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**
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** Abstract : Linker script for STM32H7 series
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** 128Kbytes FLASH and 1Mbytes RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed �as is,� without any warranty
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** of any kind.
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**
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*****************************************************************************
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** @attention
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**
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** Copyright (c) 2019 STMicroelectronics.
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** All rights reserved.
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**
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** This software component is licensed by ST under BSD 3-Clause license,
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** the "License"; You may not use this file except in compliance with the
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** License. You may obtain a copy of the License at:
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** opensource.org/licenses/BSD-3-Clause
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**
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****************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20020000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 128K
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 1M
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ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data goes into FLASH */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >FLASH
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >FLASH
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss section */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(8);
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} >RAM
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}

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