riscv: support enable more ISA for compare

Add ISA zba zbb zbc zbs zicond

config RISCV_ISA_ZBA port form
    commit c12603e
    Author: Xiao Wang <[email protected]>
    Date:   Thu May 16 17:04:30 2024 +0800

    riscv, bpf: Optimize zextw insn with Zba extension

config RISCV_ISA_ZBC port form
    commit a43fe27
    Author: Xiao Wang <[email protected]>
    Date:   Fri Jun 21 13:47:07 2024 +0800

    riscv: Optimize crc32 with Zbc extension

Change-Id: Ic77b3fd8bd3b167840e4183aea2e0757ab90e330

Author: zqb-all

arch/riscv/Kconfig

@@ -587,6 +587,18 @@ config TOOLCHAIN_HAS_ZBB
 	depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900
 	depends on AS_HAS_OPTION_ARCH
 
+config RISCV_ISA_ZBA
+	bool "Zba extension support for bit manipulation instructions"
+	default y
+	help
+	   Add support for enabling optimisations in the kernel when the Zba
+	   extension is detected at boot.
+
+	   The Zba extension provides instructions to accelerate the generation
+	   of addresses that index into arrays of basic data types.
+
+	   If you don't know what to do here, say Y.
+
 config RISCV_ISA_ZBB
 	bool "Zbb extension support for bit manipulation instructions"
 	depends on TOOLCHAIN_HAS_ZBB
@@ -603,6 +615,31 @@ config RISCV_ISA_ZBB
 
 	   If you don't know what to do here, say Y.
 
+config RISCV_ISA_ZBC
+	bool "Zbc extension support for carry-less multiplication instructions"
+	depends on MMU
+	depends on RISCV_ALTERNATIVE
+	default y
+	help
+	   Adds support to dynamically detect the presence of the Zbc
+	   extension (carry-less multiplication) and enable its usage.
+
+	   The Zbc extension could accelerate CRC (cyclic redundancy check)
+	   calculations.
+
+	   If you don't know what to do here, say Y.
+
+config RISCV_ISA_ZBS
+	bool "Zbs extension support for single-bit instructions"
+	depends on MMU
+	depends on RISCV_ALTERNATIVE
+	default y
+	help
+	   Adds support to dynamically detect the presence of the Zbs
+	   extension (single-bit) and enable its usage.
+
+	   If you don't know what to do here, say Y.
+
 config RISCV_ISA_ZICBOM
 	bool "Zicbom extension support for non-coherent DMA operation"
 	depends on MMU
@@ -633,6 +670,18 @@ config RISCV_ISA_ZICBOZ
 
 	   If you don't know what to do here, say Y.
 
+config RISCV_ISA_ZICOND
+	bool "Zicond extension support for conditional arithmetic and conditional-select/move operations"
+	depends on MMU
+	depends on RISCV_ALTERNATIVE
+	default y
+	help
+	   Adds support to dynamically detect the presence of the Zicond
+	   extension and enable its usage.
+
+	   If you don't know what to do here, say Y.
+
+
 config TOOLCHAIN_HAS_ZIHINTPAUSE
 	bool
 	default y

arch/riscv/Makefile

@@ -64,6 +64,11 @@ riscv-march-$(CONFIG_ARCH_RV64I)	:= rv64ima
 riscv-march-$(CONFIG_FPU)		:= $(riscv-march-y)fd
 riscv-march-$(CONFIG_RISCV_ISA_C)	:= $(riscv-march-y)c
 riscv-march-$(CONFIG_RISCV_ISA_V)	:= $(riscv-march-y)v
+riscv-march-$(CONFIG_RISCV_ISA_ZBA)	:= $(riscv-march-y)_zba
+riscv-march-$(CONFIG_RISCV_ISA_ZBB)	:= $(riscv-march-y)_zbb
+riscv-march-$(CONFIG_RISCV_ISA_ZBC)	:= $(riscv-march-y)_zbc
+riscv-march-$(CONFIG_RISCV_ISA_ZBS)	:= $(riscv-march-y)_zbs
+riscv-march-$(CONFIG_RISCV_ISA_ZICOND)	:= $(riscv-march-y)_zicond
 
 ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC
 KBUILD_CFLAGS += -Wa,-misa-spec=2.2