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| 1 | +; RUN: llc -mtriple=x86_64-- -global-isel=0 -print-after=finalize-isel \ |
| 2 | +; RUN: -stop-after=finalize-isel %s -o /dev/null 2>&1 | \ |
| 3 | +; RUN: FileCheck %s --check-prefix=CHECK-SDISEL |
| 4 | +; RUN: llc -mtriple=x86_64-- -global-isel=1 -print-after=finalize-isel \ |
| 5 | +; RUN: -stop-after=finalize-isel %s -o /dev/null 2>&1 | \ |
| 6 | +; RUN: FileCheck %s --check-prefix=CHECK-GISEL |
| 7 | + |
| 8 | +; PR50080 |
| 9 | +define i32 @baz(i32 %0) { |
| 10 | +; FIXME: Get rid of this conditional jump and bit test in bb.5. |
| 11 | +; FIXME: bb.2 should not have bb.5 as a predecessor. |
| 12 | +; CHECK-SDISEL: bb.0 (%ir-block.1): |
| 13 | +; CHECK-SDISEL: successors: %bb.4(0x80000000); %bb.4(100.00%) |
| 14 | +; CHECK-SDISEL: liveins: $edi |
| 15 | +; CHECK-SDISEL: %1:gr32 = COPY $edi |
| 16 | +; CHECK-SDISEL: %2:gr32 = MOV32r0 implicit-def dead $eflags |
| 17 | +; CHECK-SDISEL: %3:gr32 = COPY %1:gr32 |
| 18 | +; CHECK-SDISEL: bb.4 (%ir-block.1): |
| 19 | +; CHECK-SDISEL: ; predecessors: %bb.0 |
| 20 | +; CHECK-SDISEL: successors: %bb.3(0x55555555), %bb.5(0x2aaaaaab); %bb.3(66.67%), %bb.5(33.33%) |
| 21 | +; CHECK-SDISEL: %4:gr32 = MOV32ri 13056 |
| 22 | +; CHECK-SDISEL: BT32rr killed %4:gr32, %3:gr32, implicit-def $eflags |
| 23 | +; CHECK-SDISEL: JCC_1 %bb.3, 2, implicit $eflags |
| 24 | +; CHECK-SDISEL: bb.5 (%ir-block.1): |
| 25 | +; CHECK-SDISEL: ; predecessors: %bb.4 |
| 26 | +; CHECK-SDISEL: successors: %bb.1(0x80000000), %bb.2(0x00000000); %bb.1(100.00%), %bb.2(0.00%) |
| 27 | +; CHECK-SDISEL: %5:gr32 = MOV32ri 48 |
| 28 | +; CHECK-SDISEL: BT32rr killed %5:gr32, %3:gr32, implicit-def $eflags |
| 29 | +; CHECK-SDISEL: JCC_1 %bb.1, 2, implicit $eflags |
| 30 | +; CHECK-SDISEL: JMP_1 %bb.2 |
| 31 | +; CHECK-SDISEL: bb.1.sw.epilog8: |
| 32 | +; CHECK-SDISEL: ; predecessors: %bb.5 |
| 33 | +; CHECK-SDISEL: successors: %bb.3(0x80000000); %bb.3(100.00%) |
| 34 | +; CHECK-SDISEL: %6:gr32 = MOV32ri 1 |
| 35 | +; CHECK-SDISEL: JMP_1 %bb.3 |
| 36 | +; CHECK-SDISEL: bb.2.if.then.unreachabledefault: |
| 37 | +; CHECK-SDISEL: ; predecessors: %bb.5 |
| 38 | +; CHECK-SDISEL: bb.3.return: |
| 39 | +; CHECK-SDISEL: ; predecessors: %bb.4, %bb.1 |
| 40 | +; CHECK-SDISEL: %0:gr32 = PHI %2:gr32, %bb.4, %6:gr32, %bb.1 |
| 41 | +; CHECK-SDISEL: $eax = COPY %0:gr32 |
| 42 | +; CHECK-SDISEL: RET 0, $eax |
| 43 | + |
| 44 | + |
| 45 | +; FIXME: Get rid of this conditional jump and bit test in bb.6. |
| 46 | +; FIXME: bb.3 should not have bb.6 as a predecessor. |
| 47 | +; CHECK-GISEL: bb.1 (%ir-block.1): |
| 48 | +; CHECK-GISEL: successors: %bb.5(0x80000000); %bb.5(100.00%) |
| 49 | +; CHECK-GISEL: liveins: $edi |
| 50 | +; CHECK-GISEL: %0:gr32 = COPY $edi |
| 51 | +; CHECK-GISEL: %16:gr32 = MOV32ri 1 |
| 52 | +; CHECK-GISEL: %17:gr32 = MOV32r0 implicit-def $eflags |
| 53 | +; CHECK-GISEL: %2:gr32 = SUB32ri8 %0:gr32(tied-def 0), 0, implicit-def $eflags |
| 54 | +; CHECK-GISEL: bb.5 (%ir-block.1): |
| 55 | +; CHECK-GISEL: ; predecessors: %bb.1 |
| 56 | +; CHECK-GISEL: successors: %bb.4(0x55555555), %bb.6(0x2aaaaaab); %bb.4(66.67%), %bb.6(33.33%) |
| 57 | +; CHECK-GISEL: %3:gr32 = MOV32ri 1 |
| 58 | +; CHECK-GISEL: %21:gr8 = COPY %2.sub_8bit:gr32 |
| 59 | +; CHECK-GISEL: $cl = COPY %21:gr8 |
| 60 | +; CHECK-GISEL: %4:gr32 = SHL32rCL %3:gr32(tied-def 0), implicit-def $eflags, implicit $cl |
| 61 | +; CHECK-GISEL: %6:gr32 = AND32ri %4:gr32(tied-def 0), 13056, implicit-def $eflags |
| 62 | +; CHECK-GISEL: %7:gr32 = MOV32r0 implicit-def $eflags |
| 63 | +; CHECK-GISEL: CMP32rr %6:gr32, %7:gr32, implicit-def $eflags |
| 64 | +; CHECK-GISEL: %20:gr8 = SETCCr 5, implicit $eflags |
| 65 | +; CHECK-GISEL: TEST8ri %20:gr8, 1, implicit-def $eflags |
| 66 | +; CHECK-GISEL: JCC_1 %bb.4, 5, implicit $eflags |
| 67 | +; CHECK-GISEL: bb.6 (%ir-block.1): |
| 68 | +; CHECK-GISEL: ; predecessors: %bb.5 |
| 69 | +; CHECK-GISEL: successors: %bb.2(0x80000000), %bb.3(0x00000000); %bb.2(100.00%), %bb.3(0.00%) |
| 70 | +; CHECK-GISEL: %9:gr32 = MOV32ri 1 |
| 71 | +; CHECK-GISEL: %19:gr8 = COPY %2.sub_8bit:gr32 |
| 72 | +; CHECK-GISEL: $cl = COPY %19:gr8 |
| 73 | +; CHECK-GISEL: %10:gr32 = SHL32rCL %9:gr32(tied-def 0), implicit-def $eflags, implicit $cl |
| 74 | +; CHECK-GISEL: %12:gr32 = AND32ri8 %10:gr32(tied-def 0), 48, implicit-def $eflags |
| 75 | +; CHECK-GISEL: %13:gr32 = MOV32r0 implicit-def $eflags |
| 76 | +; CHECK-GISEL: CMP32rr %12:gr32, %13:gr32, implicit-def $eflags |
| 77 | +; CHECK-GISEL: %18:gr8 = SETCCr 5, implicit $eflags |
| 78 | +; CHECK-GISEL: TEST8ri %18:gr8, 1, implicit-def $eflags |
| 79 | +; CHECK-GISEL: JCC_1 %bb.2, 5, implicit $eflags |
| 80 | +; CHECK-GISEL: JMP_1 %bb.3 |
| 81 | +; CHECK-GISEL: bb.2.sw.epilog8: |
| 82 | +; CHECK-GISEL: ; predecessors: %bb.6 |
| 83 | +; CHECK-GISEL: successors: %bb.4(0x80000000); %bb.4(100.00%) |
| 84 | +; CHECK-GISEL: JMP_1 %bb.4 |
| 85 | +; CHECK-GISEL: bb.3.if.then.unreachabledefault: |
| 86 | +; CHECK-GISEL: ; predecessors: %bb.6 |
| 87 | +; CHECK-GISEL: bb.4.return: |
| 88 | +; CHECK-GISEL: ; predecessors: %bb.5, %bb.2 |
| 89 | +; CHECK-GISEL: %15:gr32 = PHI %16:gr32, %bb.2, %17:gr32, %bb.5 |
| 90 | +; CHECK-GISEL: $eax = COPY %15:gr32 |
| 91 | +; CHECK-GISEL: RET 0, implicit $eax |
| 92 | + |
| 93 | + switch i32 %0, label %if.then.unreachabledefault [ |
| 94 | + i32 4, label %sw.epilog8 |
| 95 | + i32 5, label %sw.epilog8 |
| 96 | + i32 8, label %sw.bb2 |
| 97 | + i32 9, label %sw.bb2 |
| 98 | + i32 12, label %sw.bb4 |
| 99 | + i32 13, label %sw.bb4 |
| 100 | + ] |
| 101 | + |
| 102 | +sw.bb2: |
| 103 | + br label %return |
| 104 | + |
| 105 | +sw.bb4: |
| 106 | + br label %return |
| 107 | + |
| 108 | +sw.epilog8: |
| 109 | + br label %return |
| 110 | + |
| 111 | +if.then.unreachabledefault: |
| 112 | + unreachable |
| 113 | + |
| 114 | +return: |
| 115 | + %retval.0 = phi i32 [ 1, %sw.epilog8 ], [ 0, %sw.bb2 ], [ 0, %sw.bb4 ] |
| 116 | + ret i32 %retval.0 |
| 117 | +} |
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