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Tonymac32ayufan
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tonymac32: rk3328: sdmmc0 drive level change to 8mA (torvalds#38)
SD Instability has been a commonly reported issue on RK3328 boards, the Rockchip default drive level of 4mA is unable to reliably drive any significant capacitive load (even within SD card specification) at 50MHz high speed, especially with 3.3V signalling. Further testing may indicate a need for 12mA, but for now this patch has been shown to resolve SD boot and stability issues on several boards, including Rock64 and a Renegade. The issue spanning multiple boards is why I didn't simply override the settings in the board specific DTS. It may also be important to note the ASUS Tinker Board (RK3288) uses 8mA drive levels. This may be worth evaluating for RK3399 as well.
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arch/arm64/boot/dts/rockchip/rk3328.dtsi

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1191,10 +1191,10 @@
11911191
emmc: dwmmc@ff520000 {
11921192
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
11931193
reg = <0x0 0xff520000 0x0 0x4000>;
1194-
clock-freq-min-max = <400000 150000000>;
1194+
max-frequency = <150000000>;
11951195
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
11961196
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
1197-
clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
1197+
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
11981198
fifo-depth = <0x100>;
11991199
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
12001200
status = "disabled";
@@ -2054,35 +2054,35 @@
20542054
sdmmc0 {
20552055
sdmmc0_clk: sdmmc0-clk {
20562056
rockchip,pins =
2057-
<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none_4ma>;
2057+
<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>;
20582058
};
20592059

20602060
sdmmc0_cmd: sdmmc0-cmd {
20612061
rockchip,pins =
2062-
<1 RK_PA4 RK_FUNC_1 &pcfg_pull_up_4ma>;
2062+
<1 RK_PA4 RK_FUNC_1 &pcfg_pull_up_8ma>;
20632063
};
20642064

20652065
sdmmc0_dectn: sdmmc0-dectn {
20662066
rockchip,pins =
2067-
<1 RK_PA5 RK_FUNC_1 &pcfg_pull_up_4ma>;
2067+
<1 RK_PA5 RK_FUNC_1 &pcfg_pull_up_8ma>;
20682068
};
20692069

20702070
sdmmc0_wrprt: sdmmc0-wrprt {
20712071
rockchip,pins =
2072-
<1 RK_PA7 RK_FUNC_1 &pcfg_pull_up_4ma>;
2072+
<1 RK_PA7 RK_FUNC_1 &pcfg_pull_up_8ma>;
20732073
};
20742074

20752075
sdmmc0_bus1: sdmmc0-bus1 {
20762076
rockchip,pins =
2077-
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_4ma>;
2077+
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_8ma>;
20782078
};
20792079

20802080
sdmmc0_bus4: sdmmc0-bus4 {
20812081
rockchip,pins =
2082-
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_4ma>,
2083-
<1 RK_PA1 RK_FUNC_1 &pcfg_pull_up_4ma>,
2084-
<1 RK_PA2 RK_FUNC_1 &pcfg_pull_up_4ma>,
2085-
<1 RK_PA3 RK_FUNC_1 &pcfg_pull_up_4ma>;
2082+
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_8ma>,
2083+
<1 RK_PA1 RK_FUNC_1 &pcfg_pull_up_8ma>,
2084+
<1 RK_PA2 RK_FUNC_1 &pcfg_pull_up_8ma>,
2085+
<1 RK_PA3 RK_FUNC_1 &pcfg_pull_up_8ma>;
20862086
};
20872087

20882088
sdmmc0_gpio: sdmmc0-gpio {

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