drivers: Flash: Add SPI NAND Flash driver support

Add SPI NAND Flash driver support

Signed-off-by: danielzhang <[email protected]>

Author: daniel-723

drivers/flash/CMakeLists.txt

@@ -67,6 +67,8 @@ zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_SMARTBOND flash_smartbond.c)
 zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_TELINK_B91 soc_flash_b91.c)
 zephyr_library_sources_ifdef(CONFIG_SOC_FLASH_XMC4XXX soc_flash_xmc4xxx.c)
 zephyr_library_sources_ifdef(CONFIG_SPI_FLASH_AT45 spi_flash_at45.c)
+zephyr_library_sources_ifdef(CONFIG_SPI_NAND bch.c)
+zephyr_library_sources_ifdef(CONFIG_SPI_NAND spi_nand.c)
 zephyr_library_sources_ifdef(CONFIG_SPI_NOR spi_nor.c)
 # zephyr-keep-sorted-stop
 

drivers/flash/Kconfig

@@ -181,6 +181,7 @@ source "drivers/flash/Kconfig.lpc"
 source "drivers/flash/Kconfig.max32"
 source "drivers/flash/Kconfig.mcux"
 source "drivers/flash/Kconfig.mspi"
+source "drivers/flash/Kconfig.nand"
 source "drivers/flash/Kconfig.nor"
 source "drivers/flash/Kconfig.nordic_qspi_nor"
 source "drivers/flash/Kconfig.npcx_fiu"

drivers/flash/Kconfig.nand

@@ -0,0 +1,48 @@
+# Copyright (c) 2022-2025 Macronix International Co., Ltd.
+# SPDX-License-Identifier: Apache-2.0
+
+menuconfig SPI_NAND
+	bool "SPI NAND Flash"
+	default y
+	depends on DT_HAS_JEDEC_SPI_NAND_ENABLED
+	select FLASH_HAS_DRIVER_ENABLED
+	select FLASH_HAS_EXPLICIT_ERASE
+	select FLASH_HAS_PAGE_LAYOUT
+	select SPI
+
+if SPI_NAND
+
+config SPI_NAND_INIT_PRIORITY
+	int
+	default 80
+	help
+	  Device driver initialization priority.
+	  Device is connected to SPI bus, it has to
+	  be initialized after SPI driver.
+
+config SPI_NAND_SOFTWARE_ECC
+	bool
+	default n
+	help
+	  Enable this option to use software-based ECC (Error Correction Code)
+	  when accessing SPI NAND flash devices. This is useful for platforms
+	  that do not support hardware ECC, or when additional software control
+	  over ECC handling is required.
+
+config SPI_NAND_ECC_STEP_SIZE
+	int
+	default 512
+	depends on SPI_NAND_SOFTWARE_ECC
+	help
+	  Specifies the ECC (Error Correction Code) step size in bytes for SPI NAND
+	  flash operations. This value determines how many bytes of data are protected
+	  by one ECC block.
+
+config SPI_NAND_BCH_HEAP_SIZE
+	int
+	default 51200
+	help
+	  Specify the heap size (in bytes) reserved for BCH (Bose-Chaudhuri-Hocquenghem)
+	  error correction in SPI NAND flash operations.
+
+endif # SPI_NAND