Why does ds_read_addtid_b32 require a following buffer_wbinvl1_vol

[Greensaid]

for an mir like below:

name: addtid
body: |
  bb.0:
    $m0 = S_MOV_B32 0
    $vgpr0 = DS_READ_ADDTID_B32 0, 0, implicit $m0, implicit $exec
    S_ENDPGM 0

if we run with the command: llc -march=amdgcn -mcpu=gfx900 -run-pass si-memory-legalizer,
the result will contain a buffer_wbinvl1_vol instruction after ds_read_addtid_b32.
I have found the handling logic in the pass: SIMemoryLegalizer , but I was wondering why there is such a logic not only for vmem instructions, but also for ds instructions. Will ds_read_addtid_b32 (and also other ds instructions?) affect L1 cache?

[ppanchad-amd]

Hi @Greensaid. Internal ticket has been created to assist with your issue. Thanks