Add support for zero-width bit extraction (backport #3352)

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This is an automatic backport of pull request #3352 done by Mergify.
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Changes to be committed:
	modified:   src/test/scala/chiselTests/SIntOps.scala
	modified:   src/test/scala/chiselTests/UIntOps.scala

Unmerged paths:
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	both modified:   core/src/main/scala/chisel3/Bits.scala

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Original PR Body

With #3321, it becomes very important that users can extract zero bits. While the (-1, 0) looks a little funny, it is the correct API for parameterized code.

Motivating example:

import chisel3._
import chisel3.util.log2Ceil
import circt.stage.ChiselStage.emitCHIRRTL

class Example(size: Int) extends Module {
  val vec  = IO(Input(Vec(size, UInt(8.W))))
  // Say we have a value we will use as an index but its width is unrelated to the Vec
  val addr  = IO(Input(UInt(8.W)))
  val out   = IO(Output(UInt(8.W)))

  // Chisel warns on mismatched widths so we bit extract
  val safeIdx = addr(log2Ceil(size) - 1, 0)
  out := vec(safeIdx)
}

// Normal sizes work great!
emitCHIRRTL(new Example(8))

// What happens with the size of the Vec is 1?
emitCHIRRTL(new Example(1))
// [error] src/main/scala/main.scala:14:21: Invalid bit range (-1,0)
// [error]   val safeIdx = addr(log2Ceil(size) - 1, 0)
// [error]                     ^
// [error] There were 1 error(s) during hardware elaboration.

(Scastie link: https://scastie.scala-lang.org/d6prKTmSRgeo2wOJErImTQ)

This change makes the extraction from (-1, 0) legal. We could make the extraction for any hi = lo - 1 legal, but I am concerned about users accidentally writing things like myUInt(5, 6) when they meant myUInt(6, 5). So instead, Chisel will give a specific suggestion in that case:

[error] .../Main.scala:13:22: Invalid bit range [hi=5, lo=6]. If you are trying to extract zero-width range, right-shift by 'lo' before extracting.
[error]       val op = myUInt(x, y)
[error]                      ^
[error] There were 1 error(s) during hardware elaboration.

The user should instead write:

val op = (myUInt >> y)(x - y, 0)

We will soon also add .take which will make it possible to write (myUInt >> y).take(x - y)

Note all of this is static so there is no hardware overhead to the shift.

Contributor Checklist

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Type of Improvement

• Feature (or new API)

Desired Merge Strategy

• Squash

Release Notes

Reviewer Checklist (only modified by reviewer)

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