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[WIP] Apx requirements for VM and GC stubs #116806

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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,9 @@ class AsmOffsets
public const int OFFSETOF__REGDISPLAY__SP = 0x1b78;
public const int OFFSETOF__REGDISPLAY__ControlPC = 0x1b80;
#else // TARGET_UNIX
public const int SIZEOF__REGDISPLAY = 0xbf0;
public const int OFFSETOF__REGDISPLAY__SP = 0xbd8;
public const int OFFSETOF__REGDISPLAY__ControlPC = 0xbe0;
public const int SIZEOF__REGDISPLAY = 0xd70;
public const int OFFSETOF__REGDISPLAY__SP = 0xcd8;
public const int OFFSETOF__REGDISPLAY__ControlPC = 0xce0;
#endif // TARGET_UNIX
#elif TARGET_ARM64
#if TARGET_UNIX
Expand Down Expand Up @@ -82,11 +82,11 @@ class AsmOffsets
// Release build offsets
#if TARGET_AMD64
#if TARGET_UNIX
public const int SIZEOF__REGDISPLAY = 0x1b80;
public const int SIZEOF__REGDISPLAY = 0x1c00;
public const int OFFSETOF__REGDISPLAY__SP = 0x1b70;
public const int OFFSETOF__REGDISPLAY__ControlPC = 0x1b78;
#else // TARGET_UNIX
public const int SIZEOF__REGDISPLAY = 0xbf0;
public const int SIZEOF__REGDISPLAY = 0xc70;
public const int OFFSETOF__REGDISPLAY__SP = 0xbd0;
public const int OFFSETOF__REGDISPLAY__ControlPC = 0xbd8;
#endif // TARGET_UNIX
Expand Down Expand Up @@ -150,7 +150,7 @@ class AsmOffsets
#if TARGET_UNIX
public const int SIZEOF__PAL_LIMITED_CONTEXT = 0xca0;
#else // TARGET_UNIX
public const int SIZEOF__PAL_LIMITED_CONTEXT = 0x4d0;
public const int SIZEOF__PAL_LIMITED_CONTEXT = 0x550;
#endif // TARGET_UNIX
#elif TARGET_ARM64
#if TARGET_UNIX
Expand Down
18 changes: 18 additions & 0 deletions src/coreclr/debug/ee/debugger.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -16891,6 +16891,24 @@ void FuncEvalFrame::UpdateRegDisplay_Impl(const PREGDISPLAY pRD, bool updateFloa
pRD->pCurrentContextPointers->R14 = &(pDE->m_context.R14);
pRD->pCurrentContextPointers->R15 = &(pDE->m_context.R15);

// This would mean we need to update winnt.h in windows sdk.
pRD->volatileCurrContextPointers.R16 = &(pDE->m_context.R16);
pRD->volatileCurrContextPointers.R17 = &(pDE->m_context.R17);
pRD->volatileCurrContextPointers.R18 = &(pDE->m_context.R18);
pRD->volatileCurrContextPointers.R19 = &(pDE->m_context.R19);
pRD->volatileCurrContextPointers.R20 = &(pDE->m_context.R20);
pRD->volatileCurrContextPointers.R21 = &(pDE->m_context.R21);
pRD->volatileCurrContextPointers.R22 = &(pDE->m_context.R22);
pRD->volatileCurrContextPointers.R23 = &(pDE->m_context.R23);
pRD->volatileCurrContextPointers.R24 = &(pDE->m_context.R24);
pRD->volatileCurrContextPointers.R25 = &(pDE->m_context.R25);
pRD->volatileCurrContextPointers.R26 = &(pDE->m_context.R26);
pRD->volatileCurrContextPointers.R27 = &(pDE->m_context.R27);
pRD->volatileCurrContextPointers.R28 = &(pDE->m_context.R28);
pRD->volatileCurrContextPointers.R29 = &(pDE->m_context.R29);
pRD->volatileCurrContextPointers.R30 = &(pDE->m_context.R30);
pRD->volatileCurrContextPointers.R31 = &(pDE->m_context.R31);

// SyncRegDisplayToCurrentContext() sets the pRD->SP and pRD->ControlPC on AMD64.
SyncRegDisplayToCurrentContext(pRD);

Expand Down
23 changes: 23 additions & 0 deletions src/coreclr/debug/inc/dbgtargetcontext.h
Original file line number Diff line number Diff line change
Expand Up @@ -256,6 +256,29 @@ typedef struct DECLSPEC_ALIGN(16) {
DWORD64 R14;
DWORD64 R15;

//EGPRs for APX
union {
struct {
DWORD64 R16;
DWORD64 R17;
DWORD64 R18;
DWORD64 R19;
DWORD64 R20;
DWORD64 R21;
DWORD64 R22;
DWORD64 R23;
DWORD64 R24;
DWORD64 R25;
DWORD64 R26;
DWORD64 R27;
DWORD64 R28;
DWORD64 R29;
DWORD64 R30;
DWORD64 R31;
};
DWORD64 R[16];
};

DWORD64 Rip;

union {
Expand Down
6 changes: 3 additions & 3 deletions src/coreclr/inc/gcinfotypes.h
Original file line number Diff line number Diff line change
Expand Up @@ -600,16 +600,16 @@ struct AMD64GcInfoEncoding {
static const int SIZE_OF_STACK_AREA_ENCBASE = 3;
static const int SIZE_OF_EDIT_AND_CONTINUE_PRESERVED_AREA_ENCBASE = 4;
static const int REVERSE_PINVOKE_FRAME_ENCBASE = 6;
static const int NUM_REGISTERS_ENCBASE = 2;
static const int NUM_REGISTERS_ENCBASE = 3;
static const int NUM_STACK_SLOTS_ENCBASE = 2;
static const int NUM_UNTRACKED_SLOTS_ENCBASE = 1;
static const int NORM_PROLOG_SIZE_ENCBASE = 5;
static const int NORM_EPILOG_SIZE_ENCBASE = 3;
static const int NORM_CODE_OFFSET_DELTA_ENCBASE = 3;
static const int INTERRUPTIBLE_RANGE_DELTA1_ENCBASE = 6;
static const int INTERRUPTIBLE_RANGE_DELTA2_ENCBASE = 6;
static const int REGISTER_ENCBASE = 3;
static const int REGISTER_DELTA_ENCBASE = 2;
static const int REGISTER_ENCBASE = 5;
static const int REGISTER_DELTA_ENCBASE = 5;
static const int STACK_SLOT_ENCBASE = 6;
static const int STACK_SLOT_DELTA_ENCBASE = 4;
static const int NUM_SAFE_POINTS_ENCBASE = 2;
Expand Down
40 changes: 38 additions & 2 deletions src/coreclr/inc/regdisp.h
Original file line number Diff line number Diff line change
Expand Up @@ -197,6 +197,34 @@ typedef struct _Arm64VolatileContextPointer
} Arm64VolatileContextPointer;
#endif //TARGET_ARM64

#if defined(TARGET_AMD64)
typedef struct _Amd64VolatileContextPointer
{
union {
struct {
PDWORD64 R16;
PDWORD64 R17;
PDWORD64 R18;
PDWORD64 R19;
PDWORD64 R20;
PDWORD64 R21;
PDWORD64 R22;
PDWORD64 R23;
PDWORD64 R24;
PDWORD64 R25;
PDWORD64 R26;
PDWORD64 R27;
PDWORD64 R28;
PDWORD64 R29;
PDWORD64 R30;
PDWORD64 R31;
//X18 is reserved by OS, in userspace it represents TEB
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Suggested change
//X18 is reserved by OS, in userspace it represents TEB

};
PDWORD64 R[16];
};
} Amd64VolatileContextPointer;
#endif //TARGET_AMD64

#if defined(TARGET_LOONGARCH64)
typedef struct _LoongArch64VolatileContextPointer
{
Expand Down Expand Up @@ -253,6 +281,10 @@ struct REGDISPLAY : public REGDISPLAY_BASE {
LoongArch64VolatileContextPointer volatileCurrContextPointers;
#endif

#ifdef TARGET_AMD64
Amd64VolatileContextPointer volatileCurrContextPointers;
#endif

#ifdef TARGET_RISCV64
RiscV64VolatileContextPointer volatileCurrContextPointers;
#endif
Expand Down Expand Up @@ -563,7 +595,11 @@ inline void FillRegDisplay(const PREGDISPLAY pRD, PT_CONTEXT pctx, PT_CONTEXT pC
// Fill volatile context pointers. They can be used by GC in the case of the leaf frame
for (int i=0; i < 18; i++)
pRD->volatileCurrContextPointers.X[i] = &pctx->X[i];
#elif defined(TARGET_LOONGARCH64) // TARGET_ARM64
#elif defined(TARGET_AMD64) // TARGET_ARM64
// Fill volatile context pointers. They can be used by GC in the case of the leaf frame
for (int i=0; i < 16; i++)
pRD->volatileCurrContextPointers.R[i] = &pctx->R[i];
#elif defined(TARGET_LOONGARCH64) // TARGET_AMD64
pRD->volatileCurrContextPointers.A0 = &pctx->A0;
pRD->volatileCurrContextPointers.A1 = &pctx->A1;
pRD->volatileCurrContextPointers.A2 = &pctx->A2;
Expand Down Expand Up @@ -664,7 +700,7 @@ inline size_t * getRegAddr (unsigned regNum, PTR_CONTEXT regs)

return (PTR_size_t)(PTR_BYTE(regs) + OFFSET_OF_REGISTERS[regNum]);
#elif defined(TARGET_AMD64)
_ASSERTE(regNum < 16);
_ASSERTE(regNum < 32);
return (size_t *)&regs->Rax + regNum;
#elif defined(TARGET_ARM)
_ASSERTE(regNum < 16);
Expand Down
6 changes: 6 additions & 0 deletions src/coreclr/jit/compiler.h
Original file line number Diff line number Diff line change
Expand Up @@ -9771,6 +9771,12 @@ class Compiler
//
bool canUseApxEncoding() const
{
#ifdef DEBUG
if (JitConfig.JitBypassApxCheck())
{
return true;
}
#endif
return compOpportunisticallyDependsOn(InstructionSet_APX);
}

Expand Down
1 change: 1 addition & 0 deletions src/coreclr/jit/jitconfigvalues.h
Original file line number Diff line number Diff line change
Expand Up @@ -374,6 +374,7 @@ RELEASE_CONFIG_INTEGER(JitNoInline, "JitNoInline", 0)

#if defined(DEBUG)
CONFIG_INTEGER(JitStressRex2Encoding, "JitStressRex2Encoding", 0) // Enable rex2 encoding for compatible instructions.
CONFIG_INTEGER(JitBypassApxCheck, "JitBypassApxCheck", 0) // Enable apx for testing
CONFIG_INTEGER(JitStressPromotedEvexEncoding, "JitStressPromotedEvexEncoding", 0) // Enable promoted EVEX encoding for
// compatible instructions.
#endif
Expand Down
20 changes: 10 additions & 10 deletions src/coreclr/nativeaot/Runtime/amd64/AsmOffsetsCpu.h
Original file line number Diff line number Diff line change
Expand Up @@ -8,28 +8,28 @@
// NOTE: the offsets MUST be in hex notation WITHOUT the 0x prefix

#ifndef UNIX_AMD64_ABI
PLAT_ASM_SIZEOF(250, ExInfo)
PLAT_ASM_SIZEOF(2D0, ExInfo)
PLAT_ASM_OFFSET(0, ExInfo, m_pPrevExInfo)
PLAT_ASM_OFFSET(8, ExInfo, m_pExContext)
PLAT_ASM_OFFSET(10, ExInfo, m_exception)
PLAT_ASM_OFFSET(18, ExInfo, m_kind)
PLAT_ASM_OFFSET(19, ExInfo, m_passNumber)
PLAT_ASM_OFFSET(1c, ExInfo, m_idxCurClause)
PLAT_ASM_OFFSET(20, ExInfo, m_frameIter)
PLAT_ASM_OFFSET(240, ExInfo, m_notifyDebuggerSP)
PLAT_ASM_OFFSET(2C0, ExInfo, m_notifyDebuggerSP)

PLAT_ASM_OFFSET(0, PInvokeTransitionFrame, m_RIP)
PLAT_ASM_OFFSET(8, PInvokeTransitionFrame, m_FramePointer)
PLAT_ASM_OFFSET(10, PInvokeTransitionFrame, m_pThread)
PLAT_ASM_OFFSET(18, PInvokeTransitionFrame, m_Flags)
PLAT_ASM_OFFSET(20, PInvokeTransitionFrame, m_PreservedRegs)

PLAT_ASM_SIZEOF(220, StackFrameIterator)
PLAT_ASM_SIZEOF(2A0, StackFrameIterator)
PLAT_ASM_OFFSET(10, StackFrameIterator, m_FramePointer)
PLAT_ASM_OFFSET(18, StackFrameIterator, m_ControlPC)
PLAT_ASM_OFFSET(20, StackFrameIterator, m_RegDisplay)
PLAT_ASM_OFFSET(210, StackFrameIterator, m_OriginalControlPC)
PLAT_ASM_OFFSET(218, StackFrameIterator, m_pPreviousTransitionFrame)
PLAT_ASM_OFFSET(290, StackFrameIterator, m_OriginalControlPC)
PLAT_ASM_OFFSET(298, StackFrameIterator, m_pPreviousTransitionFrame)

PLAT_ASM_SIZEOF(100, PAL_LIMITED_CONTEXT)
PLAT_ASM_OFFSET(0, PAL_LIMITED_CONTEXT, IP)
Expand All @@ -56,10 +56,10 @@ PLAT_ASM_OFFSET(0d0, PAL_LIMITED_CONTEXT, Xmm13)
PLAT_ASM_OFFSET(0e0, PAL_LIMITED_CONTEXT, Xmm14)
PLAT_ASM_OFFSET(0f0, PAL_LIMITED_CONTEXT, Xmm15)

PLAT_ASM_SIZEOF(130, REGDISPLAY)
PLAT_ASM_OFFSET(78, REGDISPLAY, SP)
PLAT_ASM_OFFSET(80, REGDISPLAY, IP)
PLAT_ASM_OFFSET(88, REGDISPLAY, SSP)
PLAT_ASM_SIZEOF(1B0, REGDISPLAY)
PLAT_ASM_OFFSET(F8, REGDISPLAY, SP)
PLAT_ASM_OFFSET(100, REGDISPLAY, IP)
PLAT_ASM_OFFSET(108, REGDISPLAY, SSP)

PLAT_ASM_OFFSET(18, REGDISPLAY, pRbx)
PLAT_ASM_OFFSET(20, REGDISPLAY, pRbp)
Expand All @@ -69,7 +69,7 @@ PLAT_ASM_OFFSET(58, REGDISPLAY, pR12)
PLAT_ASM_OFFSET(60, REGDISPLAY, pR13)
PLAT_ASM_OFFSET(68, REGDISPLAY, pR14)
PLAT_ASM_OFFSET(70, REGDISPLAY, pR15)
PLAT_ASM_OFFSET(90, REGDISPLAY, Xmm)
PLAT_ASM_OFFSET(110, REGDISPLAY, Xmm)

#else // !UNIX_AMD64_ABI

Expand Down
16 changes: 16 additions & 0 deletions src/coreclr/nativeaot/Runtime/regdisplay.h
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,22 @@ struct REGDISPLAY
PTR_uintptr_t pR13;
PTR_uintptr_t pR14;
PTR_uintptr_t pR15;
PTR_uintptr_t pR16;
PTR_uintptr_t pR17;
PTR_uintptr_t pR18;
PTR_uintptr_t pR19;
PTR_uintptr_t pR20;
PTR_uintptr_t pR21;
PTR_uintptr_t pR22;
PTR_uintptr_t pR23;
PTR_uintptr_t pR24;
PTR_uintptr_t pR25;
PTR_uintptr_t pR26;
PTR_uintptr_t pR27;
PTR_uintptr_t pR28;
PTR_uintptr_t pR29;
PTR_uintptr_t pR30;
PTR_uintptr_t pR31;
#endif // TARGET_AMD64

uintptr_t SP;
Expand Down
38 changes: 21 additions & 17 deletions src/coreclr/pal/inc/pal.h
Original file line number Diff line number Diff line change
Expand Up @@ -1464,24 +1464,28 @@ typedef struct DECLSPEC_ALIGN(16) _CONTEXT {
M512 Zmm31;
};

struct
union
{
DWORD64 R16;
DWORD64 R17;
DWORD64 R18;
DWORD64 R19;
DWORD64 R20;
DWORD64 R21;
DWORD64 R22;
DWORD64 R23;
DWORD64 R24;
DWORD64 R25;
DWORD64 R26;
DWORD64 R27;
DWORD64 R28;
DWORD64 R29;
DWORD64 R30;
DWORD64 R31;
struct
{
DWORD64 R16;
DWORD64 R17;
DWORD64 R18;
DWORD64 R19;
DWORD64 R20;
DWORD64 R21;
DWORD64 R22;
DWORD64 R23;
DWORD64 R24;
DWORD64 R25;
DWORD64 R26;
DWORD64 R27;
DWORD64 R28;
DWORD64 R29;
DWORD64 R30;
DWORD64 R31;
};
DWORD64 R[16];
};

} CONTEXT, *PCONTEXT, *LPCONTEXT;
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/unwinder/amd64/unwinder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -242,7 +242,7 @@ BOOL DacUnwindStackFrame(CONTEXT * pContext, KNONVOLATILE_CONTEXT_POINTERS* pCon

if (res && pContextPointers)
{
for (int i = 0; i < 16; i++)
for (int i = 0; i < 32; i++)
{
*(&pContextPointers->Rax + i) = &pContext->Rax + i;
}
Expand Down
9 changes: 8 additions & 1 deletion src/coreclr/vm/amd64/asmconstants.h
Original file line number Diff line number Diff line change
Expand Up @@ -292,7 +292,7 @@ ASMCONSTANTS_C_ASSERT(OFFSETOF__VASigCookie__pNDirectILStub
#else
// Expression is too complicated, is currently:
// (8*6 + 4*2 + 2*6 + 4 + 8*6 + 8*16 + 8 + /*XMM_SAVE_AREA32*/(2*2 + 1*2 + 2 + 4 + 2*2 + 4 + 2*2 + 4*2 + 16*8 + 16*16 + 1*96) + 26*16 + 8 + 8*5)
#define SIZEOF__CONTEXT (1232)
#define SIZEOF__CONTEXT (1360)
#endif
ASMCONSTANTS_C_ASSERT(SIZEOF__CONTEXT
== sizeof(CONTEXT));
Expand Down Expand Up @@ -445,6 +445,13 @@ ASMCONSTANTS_C_ASSERT(OFFSETOF__CONTEXT__Xmm15
ASMCONSTANTS_C_ASSERT(OFFSETOF__CONTEXT__VectorRegister
== offsetof(CONTEXT, VectorRegister[0]));

// TBD: is this needed for unix?
#if defined(UNIX_AMD64_ABI) && !defined(HOST_WINDOWS)
#define OFFSETOF__CONTEXT__R16 (8*6 + 4*2 + 2*6 + 4 + 8*6 + 8*16 + 8 + 2*16 + 8*16 + 16*16 + 96 + 128*26 + 8*8 + 8*8*7 + 8*16*16 + 8*8*8 + 8*32*16 + 8*64*16)
ASMCONSTANTS_C_ASSERT(OFFSETOF__CONTEXT__R16
== offsetof(CONTEXT, R16));
#endif // UNIX_AMD64_ABI && !HOST_WINDOWS

#define SIZEOF__FaultingExceptionFrame (0x20 + SIZEOF__CONTEXT + 16)
ASMCONSTANTS_C_ASSERT(SIZEOF__FaultingExceptionFrame
== sizeof(FaultingExceptionFrame));
Expand Down
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