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Make SPI receive buffer 32-bit aligned on 8266 #125
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The ESP8266 SPI implementation needs a 4-byte aligned read buffer, same as for transmit. Fix the ESP8266 SPI driver wrapper to ensure this alignment occurs, using same method as for transmit.
I will add this soon. I must add it to my local copy since the driver is used in several libraries and I update them with scripts. |
I looked a 2.4.0 and it does byte transfers for input and doesn't need 32-bit alignment. 2.5.0beta uses 32-bit transfers but looks like it may input too many bytes. See this. Here is the code. Note the two lines near the bottom with <<<<<<<.
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Yes, you're correct. We're going w/the 32bit mode from now on with that specific call for 2.5.x and forward. That extra write is a good catch, I didn't note it as I was eyeballing things. The "correct" way now on 8266 is to use Would you like me to submit a PR w/those changes? (basically replace transferBytes with transfer() on the 8266 SPI code) |
I don't think It it appears to send the content of the buffer then receive into the buffer. SD cards look at the bytes sent on the SPI bus for a command while sending bytes to the master on a read. You should send 0XFF over the SPI bus when receiving from an SD. You end a multi-sector read by sending CMD12, which is 0X4C. The SD looks for the 0X40 bit so 0X00 might work. See the lines with <<<<<<
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I did the following quick fix to
I did some benchmarks with 2.4.0 and 2.5.0beta2. 32-bit helps some with read. 2.4.0, SdFat V1:
2.5.0beta2, SdFat V1:
The new version of SdFat with dedicated SPI access is much faster. Write is about six times faster for 512 byte writes. Read is about two times faster. 2.5.0beta2, SdFat V2 dedicated SPI:
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Great, that's basically what I was going to do (and what transfer() does, albeit with unwanted reads). We've got an issue open to clean up the transferBytes call, but it looks like it will not make it in 2.5.0-rel. When that's done, basically the same code you've implemented will be moved into |
The ESP8266 SPI implementation needs a 4-byte aligned read buffer, same as for transmit. Fix the ESP8266 SPI driver wrapper to ensure this alignment occurs. Includes fix from @grieman to ensure only no overwrite of non-by- four transfers greiman#125 (comment)
Just FYI, esp8266/Arduino#5709 was merged allowing unaligned transfers in and out of |
The ESP8266 SPI implementation needs a 4-byte aligned read buffer,
same as for transmit. Fix the ESP8266 SPI driver wrapper to ensure
this alignment occurs, using same method as for transmit.
Without this change, occasional LoadStoreAlignment exceptions occur
depending on the input buffer alignment.