[SPIR-V] Fix ExecutionMode generation #143888
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PR llvm#141787 added code to emit the Fragment execution model. This required emitting the OriginUpperLeft ExecutionMode. But this was done by using the same codepath used for OpEntrypoint. This has 2 issues: - the interface variables were added to both OpEntryPoint and OpExecutionMode. - the existing OpExecutionMode logic was not used. This commit fixes this, regrouping OpExecutionMode handling in one place, and fixing bad codegen issue when interface variiables are added.
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@llvm/pr-subscribers-backend-spir-v Author: Nathan Gauër (Keenuts) ChangesPR #141787 added code to emit the Fragment execution model. This required emitting the OriginUpperLeft ExecutionMode. But this was done by using the same codepath used for OpEntrypoint. This has 2 issues:
This commit fixes this, regrouping OpExecutionMode handling in one place, and fixing bad codegen issue when interface variiables are added. Full diff: https://github.com/llvm/llvm-project/pull/143888.diff 3 Files Affected:
diff --git a/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp b/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
index d4becc2865049..26b94788b810e 100644
--- a/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp
@@ -510,6 +510,22 @@ void SPIRVAsmPrinter::outputExecutionMode(const Module &M) {
continue;
MCRegister FReg = MAI->getFuncReg(&F);
assert(FReg.isValid());
+
+ if (Attribute Attr = F.getFnAttribute("hlsl.shader"); Attr.isValid()) {
+ // SPIR-V common validation: Fragment requires OriginUpperLeft or
+ // OriginLowerLeft.
+ // VUID-StandaloneSpirv-OriginLowerLeft-04653: Fragment must declare
+ // OriginUpperLeft.
+ if (Attr.getValueAsString() == "pixel") {
+ MCInst Inst;
+ Inst.setOpcode(SPIRV::OpExecutionMode);
+ Inst.addOperand(MCOperand::createReg(FReg));
+ unsigned EM =
+ static_cast<unsigned>(SPIRV::ExecutionMode::OriginUpperLeft);
+ Inst.addOperand(MCOperand::createImm(EM));
+ outputMCInst(Inst);
+ }
+ }
if (MDNode *Node = F.getMetadata("reqd_work_group_size"))
outputExecutionModeFromMDNode(FReg, Node, SPIRV::ExecutionMode::LocalSize,
3, 1);
diff --git a/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp b/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
index 091368a309a82..36cc5cbe655bc 100644
--- a/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
@@ -475,21 +475,10 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
// environment if we need to.
const SPIRVSubtarget *ST =
static_cast<const SPIRVSubtarget *>(&MIRBuilder.getMF().getSubtarget());
- SPIRV::ExecutionModel::ExecutionModel ExecutionModel =
- getExecutionModel(*ST, F);
auto MIB = MIRBuilder.buildInstr(SPIRV::OpEntryPoint)
- .addImm(static_cast<uint32_t>(ExecutionModel))
+ .addImm(static_cast<uint32_t>(getExecutionModel(*ST, F)))
.addUse(FuncVReg);
addStringImm(F.getName(), MIB);
-
- if (ExecutionModel == SPIRV::ExecutionModel::Fragment) {
- // SPIR-V common validation: Fragment requires OriginUpperLeft or
- // OriginLowerLeft VUID-StandaloneSpirv-OriginLowerLeft-04653: Fragment
- // must declare OriginUpperLeft.
- MIRBuilder.buildInstr(SPIRV::OpExecutionMode)
- .addUse(FuncVReg)
- .addImm(static_cast<uint32_t>(SPIRV::ExecutionMode::OriginUpperLeft));
- }
} else if (F.getLinkage() != GlobalValue::InternalLinkage &&
F.getLinkage() != GlobalValue::PrivateLinkage) {
SPIRV::LinkageType::LinkageType LnkTy =
diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
index 2ddd028c79412..b71a9dd68dd44 100644
--- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
@@ -595,8 +595,6 @@ void SPIRVModuleAnalysis::processOtherInstrs(const Module &M) {
collectOtherInstr(MI, MAI, SPIRV::MB_DebugNames, IS);
} else if (OpCode == SPIRV::OpEntryPoint) {
collectOtherInstr(MI, MAI, SPIRV::MB_EntryPoints, IS);
- } else if (OpCode == SPIRV::OpExecutionMode) {
- collectOtherInstr(MI, MAI, SPIRV::MB_EntryPoints, IS);
} else if (TII->isAliasingInstr(MI)) {
collectOtherInstr(MI, MAI, SPIRV::MB_AliasingInsts, IS);
} else if (TII->isDecorationInstr(MI)) {
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s-perron
reviewed
Jun 12, 2025
This requires a fragment shader with an input. Found it while building |
The problem seems to describe the interface variables being added. In later versions of SPIR-V, this includes resources. Can't you generate a sample with a storage buffer or something? |
Oh right, I can get an interface variable from a buffer. I'll add this then. |
s-perron
approved these changes
Jun 12, 2025
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/157/builds/30630 Here is the relevant piece of the build log for the reference |
tomtor
pushed a commit
to tomtor/llvm-project
that referenced
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Jun 14, 2025
PR llvm#141787 added code to emit the Fragment execution model. This required emitting the OriginUpperLeft ExecutionMode. But this was done by using the same codepath used for OpEntrypoint. This has 2 issues: - the interface variables were added to both OpEntryPoint and OpExecutionMode. - the existing OpExecutionMode logic was not used. This commit fixes this, regrouping OpExecutionMode handling in one place, and fixing bad codegen issue when interface variiables are added.
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PR #141787 added code to emit the Fragment execution model. This required emitting the OriginUpperLeft ExecutionMode. But this was done by using the same codepath used for OpEntrypoint.
This has 2 issues:
This commit fixes this, regrouping OpExecutionMode handling in one place, and fixing bad codegen issue when interface variiables are added.