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Pull requests: lowRISC/ibex

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Pull requests list

Fix dsim support
#2286 opened Jun 19, 2025 by akashlevy Loading…
yosys-synlig based synthesis flow
#2280 opened May 23, 2025 by jwnrt • Draft
[fcov] Add fcov for the interaction of pmp with debug module accesses Component:DV Design verification (DV) or testing issue
#2279 opened May 21, 2025 by hcallahan-lowrisc Loading…
6
Environment Setup and Makefile Target Errors
#2277 opened May 17, 2025 by WajahatRiaz Loading…
16
Add a discrete debug module simulation mode Component:DV Design verification (DV) or testing issue Type:Enhancement Feature requests, enhancements
#2274 opened May 13, 2025 by hcallahan-lowrisc • Draft
11
[rtl] Add common security features of regfiles to separate module
#2266 opened Apr 19, 2025 by aklsh Loading…
1
9
[ibex,tracer] Uniquify trace log with module hierarchy
#2254 opened Feb 14, 2025 by Razer6 Loading…
6
Proof-of-concept Nix environments for Ibex development
#2156 opened Mar 27, 2024 by hcallahan-lowrisc • Draft
2
Bump jinja2 from 3.0.3 to 3.1.3 in /doc dependencies Pull requests that update a dependency file
#2126 opened Jan 11, 2024 by dependabot bot Loading…
Remove srecord and use objcopy instead
#2062 opened Jul 18, 2023 by ctopal-rl Loading…
3
Add support for ZiCond(Conditional move)
#2046 opened Jun 12, 2023 by asimahsan1990 Loading…
3
[rtl] Add support for direct mode in mtvec
#2044 opened May 31, 2023 by leesum1 Loading…
3
Fix Verilator 5.010 compilation error
#2042 opened May 30, 2023 by leesum1 Loading…
6
[rvfi] Only catch LSU RF write data if it's actually valid
#2009 opened Apr 4, 2023 by vogelpi Loading…
Added a makefile for running directed tests on verilator simple system
#1990 opened Feb 27, 2023 by Saad525 Loading…
@Saad525
fixed misa cosim override for different Ibex configs
#1988 opened Feb 21, 2023 by Saad525 • Draft
@Saad525
run directed tests along with random when given TEST=all
#1983 opened Feb 9, 2023 by Saad525 Loading…
Update Complaince Testing framework for ibex
#1945 opened Nov 16, 2022 by Abdulwadoodd Loading…
1
CVE-2007-4559 Patch
#1900 opened Nov 3, 2022 by TrellixVulnTeam Loading…
Create container for DV environment
#1885 opened Oct 31, 2022 by andreaskurth • Draft
3 tasks
[docs] Clean up line breaks #1191
#1858 opened Oct 16, 2022 by kal-ne Loading…
[rtl] Trim rf_reg addresses for RV32E
#1829 opened Oct 3, 2022 by ANurmi Loading…
2
[dv] Integrity error generation in memory busses Component:DV Design verification (DV) or testing issue Type:Enhancement Feature requests, enhancements
#1811 opened Sep 20, 2022 by ctopal Loading…
2
21
Improve comments around check_mem_access and mmio_load/store
#1724 opened Jul 26, 2022 by hcallahan-lowrisc Loading…
18
[ci] Add Yosys synthesis flow
#1501 opened Jan 4, 2022 by rkapuscik • Draft
2
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