@@ -47,13 +47,26 @@ static IR::Condition MakeCondition(const GcnInst& inst) {
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}
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}
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- static bool IgnoresExecMask (Opcode opcode) {
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- switch (opcode) {
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+ static bool IgnoresExecMask (const GcnInst& inst) {
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+ // EXEC mask does not affect scalar instructions or branches.
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+ switch (inst.category ) {
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+ case InstCategory::ScalarALU:
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+ case InstCategory::ScalarMemory:
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+ case InstCategory::FlowControl:
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+ return true ;
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+ default :
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+ break ;
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+ }
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+ // Read/Write Lane instructions are not affected either.
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+ switch (inst.opcode ) {
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+ case Opcode::V_READLANE_B32:
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case Opcode::V_WRITELANE_B32:
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+ case Opcode::V_READFIRSTLANE_B32:
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return true ;
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default :
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- return false ;
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+ break ;
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}
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+ return false ;
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}
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static constexpr size_t LabelReserveSize = 32 ;
@@ -147,8 +160,7 @@ void CFG::EmitDivergenceLabels() {
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// If all instructions in the scope ignore exec masking, we shouldn't insert a
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// scope.
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const auto start = inst_list.begin () + curr_begin + 1 ;
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- if (!std::ranges::all_of (start, inst_list.begin () + index, IgnoresExecMask,
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- &GcnInst::opcode)) {
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+ if (!std::ranges::all_of (start, inst_list.begin () + index, IgnoresExecMask)) {
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// Add a label to the instruction right after the open scope call.
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// It is the start of a new basic block.
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const auto & save_inst = inst_list[curr_begin];
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