Skip to content

Fix vega build warnings #13966

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Mar 2, 2019
Merged

Fix vega build warnings #13966

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
3fceca1
boards: rv32m1_vega: Have identifier match name
galak Feb 20, 2019
e2d0b32
serial: uart_rv32m1_lpuart: Fix build warnings
galak Feb 20, 2019
a4d55d5
soc: riscv32: openisa_rv32m1: Fix build warnings
galak Feb 20, 2019
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
2 changes: 1 addition & 1 deletion boards/riscv32/rv32m1_vega/rv32m1_vega_ri5cy.yaml
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
identifier: rv32m1_vega
identifier: rv32m1_vega_ri5cy
name: RV32M1-VEGA
type: mcu
arch: riscv32
Expand Down
72 changes: 36 additions & 36 deletions drivers/serial/uart_rv32m1_lpuart.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -301,14 +301,14 @@ static void rv32m1_lpuart_config_func_0(struct device *dev);
#endif

static const struct rv32m1_lpuart_config rv32m1_lpuart_0_config = {
.base = (LPUART_Type *)UART_0_BASE_ADDRESS,
.clock_name = UART_0_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)UART_0_CLOCK_NAME,
.base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_0_BASE_ADDRESS,
.clock_name = DT_OPENISA_RV32M1_LPUART_UART_0_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_0_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart0,
.clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = UART_0_CURRENT_SPEED,
#ifdef UART_0_HW_FLOW_CONTROL
.hw_flow_control = UART_0_HW_FLOW_CONTROL,
.baud_rate = DT_OPENISA_RV32M1_LPUART_UART_0_CURRENT_SPEED,
#ifdef DT_OPENISA_RV32M1_LPUART_UART_0_HW_FLOW_CONTROL
.hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_0_HW_FLOW_CONTROL,
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_0,
Expand All @@ -317,7 +317,7 @@ static const struct rv32m1_lpuart_config rv32m1_lpuart_0_config = {

static struct rv32m1_lpuart_data rv32m1_lpuart_0_data;

DEVICE_AND_API_INIT(uart_0, UART_0_LABEL,
DEVICE_AND_API_INIT(uart_0, DT_OPENISA_RV32M1_LPUART_UART_0_LABEL,
&rv32m1_lpuart_init,
&rv32m1_lpuart_0_data, &rv32m1_lpuart_0_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
Expand All @@ -326,10 +326,10 @@ DEVICE_AND_API_INIT(uart_0, UART_0_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_0(struct device *dev)
{
IRQ_CONNECT(UART_0_IRQ, UART_0_IRQ_PRI, rv32m1_lpuart_isr,
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_0_IRQ_0, DT_OPENISA_RV32M1_LPUART_0_IRQ_0_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_0), 0);

irq_enable(UART_0_IRQ);
irq_enable(DT_OPENISA_RV32M1_LPUART_0_IRQ_0);
}
#endif

Expand All @@ -342,14 +342,14 @@ static void rv32m1_lpuart_config_func_1(struct device *dev);
#endif

static const struct rv32m1_lpuart_config rv32m1_lpuart_1_config = {
.base = (LPUART_Type *)UART_1_BASE_ADDRESS,
.clock_name = UART_1_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)UART_1_CLOCK_NAME,
.base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_1_BASE_ADDRESS,
.clock_name = DT_OPENISA_RV32M1_LPUART_UART_1_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_1_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart1,
.clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = UART_1_CURRENT_SPEED,
#ifdef UART_1_HW_FLOW_CONTROL
.hw_flow_control = UART_1_HW_FLOW_CONTROL,
.baud_rate = DT_OPENISA_RV32M1_LPUART_UART_1_CURRENT_SPEED,
#ifdef DT_OPENISA_RV32M1_LPUART_UART_1_HW_FLOW_CONTROL
.hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_1_HW_FLOW_CONTROL,
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_1,
Expand All @@ -358,7 +358,7 @@ static const struct rv32m1_lpuart_config rv32m1_lpuart_1_config = {

static struct rv32m1_lpuart_data rv32m1_lpuart_1_data;

DEVICE_AND_API_INIT(uart_1, UART_1_LABEL,
DEVICE_AND_API_INIT(uart_1, DT_OPENISA_RV32M1_LPUART_UART_1_LABEL,
&rv32m1_lpuart_init,
&rv32m1_lpuart_1_data, &rv32m1_lpuart_1_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
Expand All @@ -367,10 +367,10 @@ DEVICE_AND_API_INIT(uart_1, UART_1_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_1(struct device *dev)
{
IRQ_CONNECT(UART_1_IRQ, UART_1_IRQ_PRI, rv32m1_lpuart_isr,
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_1_IRQ_0, DT_OPENISA_RV32M1_LPUART_1_IRQ_0_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_1), 0);

irq_enable(UART_1_IRQ);
irq_enable(DT_OPENISA_RV32M1_LPUART_1_IRQ_0);
}
#endif

Expand All @@ -383,14 +383,14 @@ static void rv32m1_lpuart_config_func_2(struct device *dev);
#endif

static const struct rv32m1_lpuart_config rv32m1_lpuart_2_config = {
.base = (LPUART_Type *)UART_2_BASE_ADDRESS,
.clock_name = UART_2_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)UART_2_CLOCK_NAME,
.base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_2_BASE_ADDRESS,
.clock_name = DT_OPENISA_RV32M1_LPUART_UART_2_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_2_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart2,
.clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = UART_2_CURRENT_SPEED,
#ifdef UART_2_HW_FLOW_CONTROL
.hw_flow_control = UART_2_HW_FLOW_CONTROL,
.baud_rate = DT_OPENISA_RV32M1_LPUART_UART_2_CURRENT_SPEED,
#ifdef DT_OPENISA_RV32M1_LPUART_UART_2_HW_FLOW_CONTROL
.hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_2_HW_FLOW_CONTROL,
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_2,
Expand All @@ -399,7 +399,7 @@ static const struct rv32m1_lpuart_config rv32m1_lpuart_2_config = {

static struct rv32m1_lpuart_data rv32m1_lpuart_2_data;

DEVICE_AND_API_INIT(uart_2, UART_2_LABEL,
DEVICE_AND_API_INIT(uart_2, DT_OPENISA_RV32M1_LPUART_UART_2_LABEL,
&rv32m1_lpuart_init,
&rv32m1_lpuart_2_data, &rv32m1_lpuart_2_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
Expand All @@ -408,10 +408,10 @@ DEVICE_AND_API_INIT(uart_2, UART_2_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_2(struct device *dev)
{
IRQ_CONNECT(UART_2_IRQ, UART_2_IRQ_PRI, rv32m1_lpuart_isr,
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_2_IRQ_0, DT_OPENISA_RV32M1_LPUART_2_IRQ_0_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_2), 0);

irq_enable(UART_2_IRQ);
irq_enable(DT_OPENISA_RV32M1_LPUART_2_IRQ_0);
}
#endif

Expand All @@ -424,14 +424,14 @@ static void rv32m1_lpuart_config_func_3(struct device *dev);
#endif

static const struct rv32m1_lpuart_config rv32m1_lpuart_3_config = {
.base = (LPUART_Type *)UART_3_BASE_ADDRESS,
.clock_name = UART_3_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)UART_3_CLOCK_NAME,
.base = (LPUART_Type *)DT_OPENISA_RV32M1_LPUART_UART_3_BASE_ADDRESS,
.clock_name = DT_OPENISA_RV32M1_LPUART_UART_3_CLOCK_CONTROLLER,
.clock_subsys = (clock_control_subsys_t)DT_OPENISA_RV32M1_LPUART_UART_3_CLOCK_NAME,
.clock_ip_name = kCLOCK_Lpuart3,
.clock_ip_src = kCLOCK_IpSrcFircAsync,
.baud_rate = UART_3_CURRENT_SPEED,
#ifdef UART_3_HW_FLOW_CONTROL
.hw_flow_control = UART_3_HW_FLOW_CONTROL,
.baud_rate = DT_OPENISA_RV32M1_LPUART_UART_3_CURRENT_SPEED,
#ifdef DT_OPENISA_RV32M1_LPUART_UART_3_HW_FLOW_CONTROL
.hw_flow_control = DT_OPENISA_RV32M1_LPUART_UART_3_HW_FLOW_CONTROL,
#endif
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = rv32m1_lpuart_config_func_3,
Expand All @@ -440,7 +440,7 @@ static const struct rv32m1_lpuart_config rv32m1_lpuart_3_config = {

static struct rv32m1_lpuart_data rv32m1_lpuart_3_data;

DEVICE_AND_API_INIT(uart_3, UART_3_LABEL,
DEVICE_AND_API_INIT(uart_3, DT_OPENISA_RV32M1_LPUART_3_LABEL,
&rv32m1_lpuart_init,
&rv32m1_lpuart_3_data, &rv32m1_lpuart_3_config,
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
Expand All @@ -449,10 +449,10 @@ DEVICE_AND_API_INIT(uart_3, UART_3_LABEL,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
static void rv32m1_lpuart_config_func_3(struct device *dev)
{
IRQ_CONNECT(UART_3_IRQ, UART_3_IRQ_PRI, rv32m1_lpuart_isr,
IRQ_CONNECT(DT_OPENISA_RV32M1_LPUART_3_IRQ_0, DT_OPENISA_RV32M1_LPUART_3_IRQ_0_PRI, rv32m1_lpuart_isr,
DEVICE_GET(uart_3), 0);

irq_enable(UART_3_IRQ);
irq_enable(DT_OPENISA_RV32M1_LPUART_3_IRQ_0);
}
#endif

Expand Down
2 changes: 1 addition & 1 deletion soc/riscv32/openisa_rv32m1/soc.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -146,7 +146,7 @@ void soc_interrupt_init(void)
(void)(EVENT_UNIT->EVTPENDCLEAR); /* Ensures write has finished. */

if (IS_ENABLED(CONFIG_MULTI_LEVEL_INTERRUPTS)) {
dev_intmux = device_get_binding(INTMUX_LABEL);
dev_intmux = device_get_binding(DT_OPENISA_RV32M1_INTMUX_INTMUX_LABEL);
__ASSERT(dev_intmux, "no INTMUX device found");
}
}
Expand Down